<!DOCTYPE article PUBLIC "-//NLM//DTD JATS (Z39.96) Journal Archiving and Interchange DTD v1.0 20120330//EN" "JATS-archivearticle1.dtd">
<article xmlns:xlink="http://www.w3.org/1999/xlink">
  <front>
    <journal-meta />
    <article-meta>
      <title-group>
        <article-title>Petri Nets Based Approach for Modular Verification of SysML Requirements on Activity Diagrams</article-title>
      </title-group>
      <contrib-group>
        <contrib contrib-type="author">
          <string-name>Messaoud Rahim</string-name>
          <xref ref-type="aff" rid="aff0">0</xref>
        </contrib>
        <contrib contrib-type="author">
          <string-name>Malika Boukala-Ioualalen</string-name>
          <xref ref-type="aff" rid="aff1">1</xref>
        </contrib>
        <contrib contrib-type="author">
          <string-name>Ahmed Hammad</string-name>
          <xref ref-type="aff" rid="aff0">0</xref>
        </contrib>
        <aff id="aff0">
          <label>0</label>
          <institution>FEMTO-ST Institute, UMR CNRS 6174</institution>
          ,
          <addr-line>Besançon</addr-line>
          ,
          <country country="FR">France</country>
        </aff>
        <aff id="aff1">
          <label>1</label>
          <institution>MOVEP, Computer Science department, USTHB</institution>
          ,
          <addr-line>Algiers</addr-line>
          ,
          <country country="DZ">Algeria</country>
        </aff>
      </contrib-group>
      <fpage>233</fpage>
      <lpage>248</lpage>
      <abstract>
        <p>The validation of SysML specifications needs a complete process for extracting, formalizing and verifying SysML requirements. Within an overall approach which considers an automatic verification of SysML designs by translating both requirement and behavioral diagrams, this paper proposes a modular verification of SysML functional requirements on activity diagrams. The contribution of this paper is the proposition of a methodology guided by the relationships between requirements and SysML activities for verifying complex systems with many components. We propose a model-to-model transformation to automatically derive from SysML activities a modular Petri net, then SysML requirements are formalized and verified using the derived Petri net modules. A case study is presented to demonstrate the effectiveness of the proposed approach.</p>
      </abstract>
      <kwd-group>
        <kwd>SysML</kwd>
        <kwd>Activity Diagram</kwd>
        <kwd>SysML Requirements</kwd>
        <kwd>Requirements Formalization</kwd>
        <kwd>Modular Verification</kwd>
        <kwd>Petri nets</kwd>
      </kwd-group>
    </article-meta>
  </front>
  <body>
    <sec id="sec-1">
      <title>-</title>
      <p>
        Model-based systems engineering is becoming a promising solution to design
complex systems. SysML (System Modeling Language) [
        <xref ref-type="bibr" rid="ref1">1</xref>
        ] is a standard modeling
language which has been proposed to specify systems that include heterogeneous
components. It covers four perspectives on system modeling : structure,
behavior, requirement, and parametric diagrams. Particularly, the SysML requirement
diagram is used for better organizing requirements at different levels of
abstraction, allowing their representation as model elements, and showing explicitly
the various kinds of relationships between requirements and design elements [
        <xref ref-type="bibr" rid="ref2">2</xref>
        ].
However, one of the main challenge in system design is to ensure that a model
meets its requirements. To provide a validation of SysML specifications,
existing approaches [
        <xref ref-type="bibr" rid="ref3 ref4 ref5">3–5</xref>
        ] propose to translate SysML behavioral models into formal
specification languages, then they verify temporal properties by using
modelchecking techniques. These approaches ignore systems composition and do not
relate system requirements to design elements. The activity diagram is one of
SysML models used to specify the system behavior and where requirements can
be verified. Based on using the call behavior action concept, a modular design of
complex systems can be obtained by structuring its behaviour in many
activities. This provides a compositional specification and enables modular analysis of
the specified systems [
        <xref ref-type="bibr" rid="ref6">6</xref>
        ]. Requirements can be expressed as properties to verify
by an activity diagram during its execution. Unfortunately, the need for formal
specifications of properties expressed using logics or automata is a major
obstacle for the adoption of formal verification techniques by SysML practitioners [
        <xref ref-type="bibr" rid="ref7">7</xref>
        ].
The contribution of this paper is the proposition of a methodology which provides
a modular verification of functional SysML requirements captured by activity
diagrams. It consists on: (1) performing a compositional translation from SysML
activity diagrams into modular Petri nets where modular PNML [
        <xref ref-type="bibr" rid="ref8">8</xref>
        ] is used as
target language. (2) proposing a new language (AcTRL : Activity Temporal
Requirement Language) to express functional requirements related to activities and
showing how AcTRL expressions can be automatically translated into properties
expressed as temporal logic formulas. Finally, (3) presenting a modular
verification algorithm. The compositional translation enables the modular verification
by considering the decomposition of activity diagrams into sub-activities and
the use of AcTRL avoids the specification of SysML requirements directly as
properties of the formal semantic model (Petri nets in our case).
This paper is organized as follows. Section 2 surveys related works. Section 3
presents related concepts. Section 4, introduces our overall methodology. In
Section 5, we present a compositional translation from SysML activities to modular
Petri nets. In Section 6, we define AcTRL and its grammar. An algorithm for
modular verification of requirements will be presented in section 7. In Section
8, we illustrate our approach by a case study. Finally, in Section 9, we conclude
and we outline future works.
2
      </p>
    </sec>
    <sec id="sec-2">
      <title>Related Work</title>
      <p>
        Ensuring the correctness of complex and critical systems needs automated
approaches for verifying and validating their designs. In [
        <xref ref-type="bibr" rid="ref3">3</xref>
        ], authors propose to
derive for each SysML behavioral diagram a formal semantic model reflecting its
characteristics. In this work, requirements was expressed as temporal properties
on the formal semantic model which makes the verification process difficult for
SysML practitioners. Linhares et al [
        <xref ref-type="bibr" rid="ref9">9</xref>
        ] designed a process for verifying SysML
specification by considering block, activity and requirement diagrams and where
requirements must be expressed using Linear Temporal Logic(LTL). In [
        <xref ref-type="bibr" rid="ref4">4</xref>
        ],
authors propose TEPE, a graphical temporal property expression language based
on SysML parametric diagram to express system requirements. This work is
restricted to state machine diagrams. Regarding activity diagram, a symbolic
model checking was proposed in [
        <xref ref-type="bibr" rid="ref10">10</xref>
        ], where activity diagram is translated into
SMV and the NuSMV model checker was used to verify LTL properties. Data
flows were not considered in this work. In [
        <xref ref-type="bibr" rid="ref11">11</xref>
        ], the authors present a technique
to map the SysML activities to time Petri net for validating the requirements of
real-time systems with energy constraints. This work considers non functional
requirements. The work presented in [
        <xref ref-type="bibr" rid="ref12">12</xref>
        ] proposes a model-driven engineering
approach for simulating SysML activity diagram using Petri net and
VHDLAMS. This work focuses on defining rules to translate SysML diagram elements
to Petri net specification but it does not consider compositional structure of
activity diagrams. To our knowledge, the present work is the first that
considers a modular verification of SysML requirements by taking into account their
relations to activities.
3
      </p>
    </sec>
    <sec id="sec-3">
      <title>Preliminaries</title>
      <p>
        In this section, we present SysML requirement and activity diagrams as described
in the OMG standard [
        <xref ref-type="bibr" rid="ref1">1</xref>
        ]. In addition, we describe modular PNML language [
        <xref ref-type="bibr" rid="ref8">8</xref>
        ]
for representing modular Petri nets.
3.1
      </p>
      <sec id="sec-3-1">
        <title>SysML requirement diagram</title>
        <p>
          Requirements in SysML are defined in an informal way with an identifier and a
text. Requirement diagrams are used for specifying requirements and to depict
their hierarchy and the exiting relationships between them and other SysML
models. As depicted in Figure 1, the &lt;&lt;Verify&gt;&gt; relationship is a dependency
between a requirement and a test case that can determine whether a system
fulfills the requirement [
          <xref ref-type="bibr" rid="ref1">1</xref>
          ]. The &lt;&lt;deriveReqt&gt;&gt; relationship is a dependency
between two requirements. It is used to derive a requirement from another. Other
relationships exists, we refer to [
          <xref ref-type="bibr" rid="ref1">1</xref>
          ] for a detailed description.
        </p>
        <p>In this paper, we exploit the &lt;&lt;Verify&gt;&gt; relationship, to determine the
activities which are used to verify requirements. We derive from functional
requirements, more formal requirements described as properties about activity diagram
elements. For tractability purpose, the &lt;&lt;deriveReqt&gt;&gt; relationship will be
exploited to relate between natural text and the more formal requirements.
3.2</p>
      </sec>
      <sec id="sec-3-2">
        <title>SysML activity diagram</title>
        <p>
          In this section, we introduce only a brief description of the SysML activity
diagram and its elements, more details can be found in [
          <xref ref-type="bibr" rid="ref1">1</xref>
          ]. In SysML, an activity
is a formalism for describing behaviour that specifies the transformation of
inputs to outputs through a controlled sequence of actions. The basic constructs
of an activity are actions and control nodes as illustrated in Figure 2. Actions
are the building blocks of activities, each action can accept inputs and produces
outputs, called tokens. These tokens can correspond to anything that flows such
as information or physical item (e.g., water, signal). Control nodes include fork,
join, decision, merge, initial, activity final, and flow final.
        </p>
        <p>A specific type of action is the call behavior action. A call behavior action
permits to invoke an activity when it starts, and passes the tokens from its input
pins to the input parameter nodes of the invoked activity. A call behavior
action terminates when its invoked activity reaches an activity final, or when the
action receives a control disable. The tokens on the output parameter nodes of
the activity are placed on the output pins of the action and a control token is
placed on each of the control outputs of the action.
3.3</p>
      </sec>
      <sec id="sec-3-3">
        <title>PNML for Modular Peri nets</title>
        <p>
          The Petri Net Markup Language (PNML) [
          <xref ref-type="bibr" rid="ref13">13</xref>
          ] is an interchange format for all
kinds of Petri nets. It is currently standardised by ISO/IEC JTC1/SC7 WG 19
as Part 2 of ISO/IEC 15909 [
          <xref ref-type="bibr" rid="ref13">13</xref>
          ]. The main features of PNML are its readability
which is guaranteed by its XML syntax, its universality to support different
Petri net type and its mutuality guaranteed by the use of common principals and
common notations [
          <xref ref-type="bibr" rid="ref8">8</xref>
          ]. To address real world systems which are too large to be
drawn on single page, the PNML provide a net type independent mechanism for
structuring large Petri nets. Two mechanisms are proposed, pages and modules.
The concept of pages is used with the concept of references to structure the nets
on several pages. It is used only for more convivial visual structure of the nets.
The concept of modules is supported by modular PNML. Modular PNML as
presented in [
          <xref ref-type="bibr" rid="ref8">8</xref>
          ] is an extension of the PNML to describe modular Petri nets. It is
proposed for defining Petri net modules and for constructing nets from different
instances of such modules. A Petri net module is defined as a Petri net with
an interface composed by imported and exported nodes. For the transformation
to perform in this work, we have extended the PNML (P/T Type) meta-model
to support a modular structure of Petri nets. The Figure 3 presents an extract
of Modular PNML meta-model which we have inspired from [
          <xref ref-type="bibr" rid="ref8">8</xref>
          ]. The presented
Modular PNML meta-model extends the core PNML meta-model to allow the
definition of modules (ModuleDef) and their instantiation (ModuleInst). Each
module includes an interface which contains import and export nodes. A module
instance assigns import nodes to reference nodes (ParmAssign) and can contains
a reference nodes from other instances(InstRefNode). More explanations can be
found in [
          <xref ref-type="bibr" rid="ref8">8</xref>
          ].
4
        </p>
      </sec>
    </sec>
    <sec id="sec-4">
      <title>Overall methodology</title>
      <p>In this section, we describe our methodology for verifying SysML requirements
on activity diagrams. First, the SysML designer creates requirement and activity
diagrams to specify the system. Then, he drives from functional requirements,
which are related to the activity diagram by a &lt;&lt;Verify&gt;&gt; relationship,
temporal requirements described as properties about activity diagram elements. After
that, an automatic translation process is used to transform this SysML
specification into a formal specification. The SysML activity diagram is translated into
modular Petri net and temporal requirements into formal properties described
as temporal logic formulas. A Petri Net tool will be used to check if these
requirements are verified in the derived Petri net modules. The verification will
be guided by the existing &lt;&lt;Verify&gt;&gt; relationships between requirements and
activities. Finally, a feed back is given to the SysML designer to correct his
specification. As our approach is modular, in the case of the non satisfaction of a
requirement, the generated feed back can give a more accurate indication about
the sub activity and the actions which are related to the design error. The Figure
4 summarizes the steps of our methodology.</p>
    </sec>
    <sec id="sec-5">
      <title>From activity diagrams to modular Petri nets</title>
      <p>
        In this section, we describe our translation of SysML activity diagrams into
modular PNML. We propose to use the activity diagram meta-model defined in
the TOPCASED tool [
        <xref ref-type="bibr" rid="ref14">14</xref>
        ] as source meta-model and the modular PNML
metamodel presented in Section 3.3 as target meta-model. Based on EMF( Eclipse
Modeling Framework) with Ecore meta meta-model and ATL language [
        <xref ref-type="bibr" rid="ref15">15</xref>
        ], the
transformations are defined as semantic and structural mappings based on the
respective meta-models. The target model of the transformation is a modular
Petri net described in modular PNML which preserve the structure and the
semantic of the source SysML activity diagram model.
      </p>
      <sec id="sec-5-1">
        <title>Mapping the structure</title>
        <p>The transformation must preserve the composite structure of the SysML
activity diagram in the target Petri net model. When the SysML activity diagram
includes a call behavior actions to define composite activities, the derived Petri
net will be composed of modules. Each sub-activity is translated into Petri net
module.</p>
        <p>The Figure 5 illustrates the derivation of the Petri net modular structure
according to the activity decomposition.</p>
        <p>We create a PNML document and Petri net only for the main activity
diagram. For a sub-activity, we create a Petri net module. The ATL rule used to
select the main activity is given below:
rule mainAct2mpnml {
from
d: ADUML!Activity(not (d.owner.oclIsTypeOf(ADUML!Activity)))
to
p : MPNML!PetriNetDoc (nets &lt;- f, modulesDef
&lt;PNML!ModuleDef.allInstances()),
s: MPNML!Name(text &lt;- d.name),
f: MPNML!PetriNet(name &lt;- s)
.....
}
5.2</p>
      </sec>
      <sec id="sec-5-2">
        <title>Translating SysML activity constructs</title>
        <p>
          The translation of basic activity constructs is inspired from the work presented
in [
          <xref ref-type="bibr" rid="ref5 ref6">5,6</xref>
          ]. So, as we are interested to preserve the composite structure of the SysML
activity diagram, we have adapted this translations mainly for input and output
pins. The Figure 6 presents the used translation rules.
        </p>
        <p>Translating call behavior actions Three principal steps are considered when
translating call behavior actions :
– Step 1: pass input flows from call behavior action to the called activity.
– Step 2: execute the called activity.</p>
        <p>– Step 3: pass output flows from the called activity to the call behaviour action.
The mapping of a call behavior action A that invokes an activity Act with one
input and one output control flow, n input pins and m output pins is as presented
in Figure 7. The PNML code related to this translation includes definitions of
transitions, places and arcs related to step 1 and step 3. It must also include
an instance of the Petri net module defined for the activity Act (see the next
section). This instance is defined like in the following listing :
&lt;instance id="A_Act" ref=URI#Act&gt;
&lt;Paramassign parameter="ictparm" ref="ictpar"/&gt;
&lt;Paramassign parameter="iparm1" ref="ipar1"/&gt;
......
&lt;Paramassign parameter="iparmn" ref="iparn"/&gt;
&lt;/instance&gt;
We signal that the nodes octpar, opar1, opar2, ....oparn (step 3) are instance
reference places. They are defined in modular PNML like :
&lt;InstRefPlace id="octpar" instance="A_Act" ref="octparm"/&gt;
&lt;InstRefPlace id="opar1" instance="A_Act" ref="oparm1"/&gt;
.....
&lt;InstRefPlace id="oparm" instance="A_Act" ref="oparmm"/&gt;
5.3</p>
      </sec>
      <sec id="sec-5-3">
        <title>Mapping Sub-Activities</title>
        <p>As described in Section 5.1, sub-activities are translated into PNML modules.
Activity parameters are for accepting inputs to an activity and providing outputs
from it. An activity with input and output parameters is translated into PNML
module as illustrated in Figure 8. Input activity parameters are translated into
reference places. Output activity parameters are translated into places. The
interface of the PNML module is composed of import places and export places.
Import places are refereed by the reference places representing input activity
parameters. Export places refer to places representing output activity parameters.
6</p>
      </sec>
    </sec>
    <sec id="sec-6">
      <title>AcTRL: Activity Temporal Requirement language</title>
      <p>
        As presented in Section 3.1, SysML requirements are described using an Id and
natural text. To address this limitation, we propose AcTRL(Activity temporal
requirement language) which can be used by SysML designers to express
requirements to verify on activity diagrams. First, we define a high level representation
of the activity diagram operational semantic as states/transitions system. Then,
we define a set of predicate expressions which can be formulated about the states
of activity diagram elements. To express temporal requirements related to the
execution of an activity diagram, predicate expressions about activity elements
are temporally quantified using the property specification pattern system
proposed in [
        <xref ref-type="bibr" rid="ref16">16</xref>
        ].
6.1
      </p>
      <sec id="sec-6-1">
        <title>Operational semantic of SysML activity diagram</title>
        <p>During execution, at each instant, an activity has a specific state. This state
is defined among others by : the activity status (not started, started, finished),
the states of all its actions, the states of its input and output parameters and
the value of all the local variables used to express guards defined to control the
tokens flows. The state of an action is defined by : its status (active, not active),
the states of its incoming and outgoing control flows and the states of its input
and output pins. According to this description, the operational semantic of an
activity diagram can be represented by a high level states/transitions system as
depicted in Figure 9.</p>
      </sec>
      <sec id="sec-6-2">
        <title>Predicate expressions about activity diagram elements</title>
        <p>In this section, we present a sub-set of predicate expressions which can
characterize the elements of an activity diagram during its execution. Let ActivityN ame
an activity, examples of such predicate expressions are :
1. If actionN ame is action from activity ActivityN ame, then
[ActivityN ame].[actionN ame].isActive() is a valid predicate expression. Its
value is True on a given state if actionN ame is on execution.
2. If actionN ame is action from activity ActivityN ame and ctlf N ame an
incoming control flow of actionN ame, then
[actionN ame].incoming[ctlf N ame].isN otEmpty() is a valid predicate
expression. The same expression can be defined for an output control flow.
3. If actionN ame is action from activity ActivityN ame and P inN ame is its
input pin, then
[actionN ame].input[P inN ame].isN otEmpty() is a valid predicate
expression. The same expression can be defined for an output pin.
4. All the boolean OCL expressions about the objects manipulated in the
activity ActivityN ame are valid predicate expressions.
5. All the boolean expressions about the local variables used in ActivityN ame
are valid predicate expressions.
6. If actExp is a valid predicate expression, then not actExp is valid predicate
expression.
7. If actExp1, actExp2 are valid expressions, then actExp1 and actExp2 and
actExp1 or actExp2 are valid expressions.
6.3</p>
      </sec>
      <sec id="sec-6-3">
        <title>Temporal expressions</title>
        <p>
          The idea of property specification pattern system [
          <xref ref-type="bibr" rid="ref16">16</xref>
          ] is to allow users to
construct complex properties from basic, assuredly correct building blocks by
providing generic specification patterns (left side of Figure 10) encoding certain
elementary properties: existence, absence, universality, bounded existence,
precedence (chains), and response (chains), each specialized for a set of different scopes
(right side of Figure 10) : globally, before R, after Q, between Q and R, after Q
until R.
        </p>
        <p>Given an activity diagram, requirements about its execution are interpreted as
properties over the states of its elements. These states can be characterized by
the predicate expressions defined above. The SysML designer derives from
functional requirements the elementary predicate expressions, then, he formalizes
requirements by quantifying the predicate expressions by the necessary patterns
and scopes to get temporal requirements about the activity execution. In the
following, is given the grammar of the AcTRL (&lt;Pred-exp&gt; is predicate expression
as defined above):
&lt;AcTRL&gt;::= &lt;pattern&gt; &lt;scope&gt;
&lt;pattern&gt;::= always &lt;Pred-exp&gt;
| never &lt;Pred-exp&gt;
| eventually &lt;Pred-exp&gt;
| &lt;Pred-exp&gt; precededing &lt;Pred-exp&gt;
| &lt;Pred-exp&gt; following &lt;Pred-exp&gt;
&lt;scopes&gt; ::= globally
| before &lt;Pred-exp&gt;
| after &lt;Pred-exp&gt;
| between &lt;Pred-exp&gt; and &lt;Pred-exp&gt;
| after &lt;Pred-exp&gt; until &lt;Pred-exp&gt;
6.4</p>
      </sec>
      <sec id="sec-6-4">
        <title>Translation into CTL/LTL formulas</title>
        <p>
          Functional requirements described using AcTLR can automatically translated
into temporal logic formulas. A complete library is provided in [
          <xref ref-type="bibr" rid="ref17">17</xref>
          ], which
propose translations into many formalisms (LTL, CTL, QREs, ...). So, we have to
give a semantic for the defined predicate expressions according to the
translation of activity diagram into Petri nets. As example, we consider the following
predicate expression: [ActivityN ame].[actionN ame].isActive(), according to the
translation of an action ( Figure 6 ) will be translated into (M arking(on_A) =&lt;
1 &gt;), a proposition which means : the place on_A contains the mark &lt; 1 &gt;.
As second example, the predicate expression [actionN ame].output[P inN ame]
.isN otEmpty(), according to the translation of output pins (Figure 6), will
be translated into (M arking(P _OutApin)! =&lt;&gt;), which means : the place
P _OutApin is marked.
7
        </p>
      </sec>
    </sec>
    <sec id="sec-7">
      <title>Modular verification of requirements</title>
      <p>Considering the compositional structure of activity diagrams can reduce the
spatial and temporal complexity of their verification by model-checking. In this
section, we propose an algorithm that guides the modular verification of SysML
requirements on activities. We consider the verification of functional SysML
requirements on a composite activity diagram where a set of call behavior actions is
used to call set of activities. The proposed modular verification concerns the
subactivities and the composite activities according to their relations with SysML
requirements. We assume that all functional requirements related to activities
are expressed in AcTRL and depicted in a requirement diagram. By exploiting
the &lt;&lt; verif y &gt;&gt; relationships, we generate a set of associations Set-Req-act
containing all couples (ReqId, ActName), where ReqId is a requirement related
to the activity ActName by a &lt;&lt; verif y &gt;&gt; relationship.</p>
      <p>When performing the translation of an activity diagram into a modular Petri
net, we generate a set of associations Set-ACT-PNM containing all couples
(ActName, PNMname), where PNMname is a Petri net module translated from the
activity ActName. When performing the translation of functional requirements
expressed in AcTRL into temporal logic formulas, we generate a set of
association Set-Req-LFor, which contains all couples (ReqId, lform), where Lform is a
temporal logic formula derived from the requirement ReqId.</p>
      <p>The verification of requirements on activities is achieving according to the
algorithm 1. Changing the design of a sub-activity may influence the verification of a
requirement related to its main activity. For this reason, the requirements related
to a composite activity are verified after the validation of all the requirements
related to their sub-activities. The algorithm begins by verifying the
requirements related to sub-activities, then it process the verification of requirements
related to composite activities until it reaches the main activity. The algorithm
has complexity depending on the complexity of the model-checking (the function
check()). It process N check; where N is the number of requirements.
Algorithm 1 Verify(ActName)</p>
    </sec>
    <sec id="sec-8">
      <title>Application : A Ticket Vending Machine case study</title>
      <p>In this section, we consider a Ticket Vending Machine(TVM) case study to
illustrate our methodology. A TVM can be used to dispense tickets to passengers
at a railway station. The behavior of the machine is triggered by passengers
who need to buy a ticket. When passenger starts a session, TVM will request
trip information from commuter. Passengers use the front panel to specify their
boarding and destination place, details of passengers (number of adults and
children) and date of travel. Based on the provided trip info, TVM will calculate
payment due and display the fare for the requested ticket. Then, it requests
payment options. Those options include payment by cash, or by credit or debit card.
After that, the passenger chooses a payment option and processes to payment.
After a success payment, the TVM prints and provides a ticket to passenger.
We specify the function of TVM by the activity diagram shown in Figure 11a.
The activity diagram describes a composite activity which calls another
activities. As example, we present the "process payment" sub-activity in the Figure
11b.</p>
      <p>We specify the requirements to verify by activities using requirement
diagrams. As example, two requirements are presented in Figure 12. They are
expressed in AcTRL and related by a &lt;&lt; verif y &gt;&gt; relationship to activities.
In this diagram extract, Set-Req-act = {(DREQ1, TicketVending), (DREQ2,
Process Payment)}. From AcTRL expressions, we derive two logic formulas F1
and F2. As consequence, Set-Req-LFor = {(DREQ1, F1), (DREQ2, F2)}.</p>
      <p>The activity diagram is translated into Petri net modules described in PNML.
The running of the implemented ATL rules produces a XMI serialisation of the
modular PNML document. The Figure 13 shows the structure of the derived
(a) A main activity diagram for TVM
(b) A sub-activity representing the
payment process
PNML document. As the SysML activity diagram contains three sub-activities,
the derived PNML document will be composed of a main Petri net and a Petri net
module for each sub-activity. The set Set-ACT-PNM contains (TicketVending,
Petri net TicketVending) and (Process Payment, Module ProcessPayment). By
applying the algorithm 1, F2 will be checked in "Module ProcessPayment" then
F2 will be checked in "Petri net TicketVending".
In this paper, we presented a methodology that proposes a modular verification
of SysML specifications. The proposed methodology considers both requirements
and activity diagrams. It consists on translating a composite activity diagram
into modular Petri net. Then, it proposes a formalization of requirements
related to activities by the proposition of AcTRL, which can be used by SysML
designers and their expressions are translatable into temporal logics. Finally, an
algorithm is proposed to guide the modular verification of SysML requirements.
The translation from SysML activities to modular Petri net was fully automated
using model to model transformation with ATL language. To illustrate the
effectiveness of the proposed methodology, a practical case study was given.
As future work, we plan to automatize the translation of AcTRL expressions
according to the translation of the activity diagram. Also, we plan to implement
our methodology into complete framework. By completing these tasks, a SysML
specification with requirements and activity diagram can be automatically
verified using a Petri net tool. The next step will be the feedback of analysis results
and their interpretation on SysML models.</p>
    </sec>
  </body>
  <back>
    <ref-list>
      <ref id="ref1">
        <mixed-citation>
          1. OMG:
          <article-title>OMG Systems Modeling Language (OMG SysMLTM) Version 1</article-title>
          .
          <fpage>2</fpage>
          .
          <article-title>(2010) downloadable</article-title>
          from http://www.omg.org.
        </mixed-citation>
      </ref>
      <ref id="ref2">
        <mixed-citation>
          2.
          <string-name>
            <surname>Nejati</surname>
            ,
            <given-names>S.</given-names>
          </string-name>
          ,
          <string-name>
            <surname>Sabetzadeh</surname>
            ,
            <given-names>M.</given-names>
          </string-name>
          ,
          <string-name>
            <surname>Falessi</surname>
            ,
            <given-names>D.</given-names>
          </string-name>
          ,
          <string-name>
            <surname>Briand</surname>
            ,
            <given-names>L.</given-names>
          </string-name>
          ,
          <string-name>
            <surname>Coq</surname>
            ,
            <given-names>T.</given-names>
          </string-name>
          :
          <article-title>A SysML-based approach to traceability management and design slicing in support of safety certification: Framework, tool support, and case studies</article-title>
          .
          <source>Information and Software Technology</source>
          <volume>54</volume>
          (
          <year>2012</year>
          )
          <fpage>569</fpage>
          -
          <lpage>590</lpage>
        </mixed-citation>
      </ref>
      <ref id="ref3">
        <mixed-citation>
          3.
          <string-name>
            <surname>Debbabi</surname>
            ,
            <given-names>M.</given-names>
          </string-name>
          ,
          <string-name>
            <surname>Hassaine</surname>
            ,
            <given-names>F.</given-names>
          </string-name>
          ,
          <string-name>
            <surname>Jarraya</surname>
            ,
            <given-names>Y.</given-names>
          </string-name>
          ,
          <string-name>
            <surname>Soeanu</surname>
            ,
            <given-names>A.</given-names>
          </string-name>
          ,
          <string-name>
            <surname>Alawneh</surname>
            ,
            <given-names>L.</given-names>
          </string-name>
          :
          <article-title>Verification and Validation in Systems Engineering: Assessing UML/SysML Design Models</article-title>
          .
          <source>1st edn</source>
          . Springer-Verlag New York, Inc., New York, NY, USA (
          <year>2010</year>
          )
        </mixed-citation>
      </ref>
      <ref id="ref4">
        <mixed-citation>
          4.
          <string-name>
            <surname>Knorreck</surname>
            ,
            <given-names>D.</given-names>
          </string-name>
          ,
          <string-name>
            <surname>Apvrille</surname>
          </string-name>
          , L.,
          <string-name>
            <surname>de</surname>
            Saqui-Sannes,
            <given-names>P.</given-names>
          </string-name>
          :
          <article-title>TEPE: a SysML language for timeconstrained property modeling and formal verification</article-title>
          .
          <source>ACM SIGSOFT Software Engineering Notes</source>
          <volume>36</volume>
          (
          <year>2011</year>
          )
          <fpage>1</fpage>
          -
          <lpage>8</lpage>
        </mixed-citation>
      </ref>
      <ref id="ref5">
        <mixed-citation>
          5.
          <string-name>
            <surname>Foures</surname>
            ,
            <given-names>D.</given-names>
          </string-name>
          ,
          <string-name>
            <surname>Vincent</surname>
            ,
            <given-names>A.</given-names>
          </string-name>
          ,
          <string-name>
            <surname>Pascal</surname>
            ,
            <given-names>J.:</given-names>
          </string-name>
          <article-title>ACTIVITYDIAGRAM2PETRINET : Transformation-Based Model In Accordance With The Omg SySML Specifications</article-title>
          .
          <source>In: Proceedings of the Eurosis, The 2011 European Simulation and Modelling Conference</source>
          . (
          <year>2011</year>
          )
          <fpage>429</fpage>
          -
          <lpage>434</lpage>
        </mixed-citation>
      </ref>
      <ref id="ref6">
        <mixed-citation>
          6.
          <string-name>
            <surname>Rahim</surname>
            ,
            <given-names>M.</given-names>
          </string-name>
          ,
          <string-name>
            <surname>Hammad</surname>
            ,
            <given-names>A.</given-names>
          </string-name>
          ,
          <string-name>
            <surname>Ioulalen</surname>
            ,
            <given-names>M.</given-names>
          </string-name>
          :
          <article-title>Modular and Distributed Verification of SysML Activity Diagrams</article-title>
          .
          <source>In: MODELSWARD</source>
          <year>2013</year>
          ,
          <source>1st Int. Conf. on ModelDriven Engineering and Software Development</source>
          , Barcelona,
          <string-name>
            <surname>Spain.</surname>
          </string-name>
          (
          <year>2013</year>
          )
          <fpage>202</fpage>
          -
          <lpage>205</lpage>
        </mixed-citation>
      </ref>
      <ref id="ref7">
        <mixed-citation>
          7.
          <string-name>
            <surname>Klein</surname>
            ,
            <given-names>F.</given-names>
          </string-name>
          ,
          <string-name>
            <surname>Giese</surname>
          </string-name>
          , H.:
          <article-title>Joint structural and temporal property specification using timed story scenario diagrams</article-title>
          . In: Fundamental Approaches to Software Engineering. Springer (
          <year>2007</year>
          )
          <fpage>185</fpage>
          -
          <lpage>199</lpage>
        </mixed-citation>
      </ref>
      <ref id="ref8">
        <mixed-citation>
          8.
          <string-name>
            <surname>Michael</surname>
            ,
            <given-names>W.</given-names>
          </string-name>
          ,
          <string-name>
            <surname>Ekkart</surname>
            ,
            <given-names>K.</given-names>
          </string-name>
          :
          <article-title>The Petri net markup language</article-title>
          .
          <source>In: Petri Net Technology for Communication-Based Systems</source>
          . Springer (
          <year>2003</year>
          )
          <fpage>124</fpage>
          -
          <lpage>144</lpage>
        </mixed-citation>
      </ref>
      <ref id="ref9">
        <mixed-citation>
          9.
          <string-name>
            <surname>Linhares</surname>
            , Marcos Vinicius and de Oliveira, Rômulo Silva and Farines,
            <given-names>J-M</given-names>
          </string-name>
          and
          <article-title>Vernadat, François: Introducing the modeling and verification process in SysML</article-title>
          . In:
          <article-title>Emerging Technologies and Factory Automation (ETFA) IEEE Conference</article-title>
          , IEEE (
          <year>2007</year>
          )
          <fpage>344</fpage>
          -
          <lpage>351</lpage>
        </mixed-citation>
      </ref>
      <ref id="ref10">
        <mixed-citation>
          10.
          <string-name>
            <surname>Eshuis</surname>
          </string-name>
          , R.:
          <article-title>Symbolic model checking of UML activity diagrams</article-title>
          .
          <source>ACM Transactions on Software Engineering and Methodology (TOSEM) 15</source>
          (
          <year>2006</year>
          )
          <fpage>1</fpage>
          -
          <lpage>38</lpage>
        </mixed-citation>
      </ref>
      <ref id="ref11">
        <mixed-citation>
          11.
          <string-name>
            <surname>Andrade</surname>
            ,
            <given-names>E.</given-names>
          </string-name>
          ,
          <string-name>
            <surname>Macie</surname>
            ,
            <given-names>P.</given-names>
          </string-name>
          ,
          <string-name>
            <surname>Callou</surname>
            ,
            <given-names>G.</given-names>
          </string-name>
          ,
          <string-name>
            <surname>Nogueira</surname>
            ,
            <given-names>B.</given-names>
          </string-name>
          :
          <article-title>A Methodology for Mapping SysML Activity Diagram to Time Petri Net for Requirement Validation of Embedded Real-Time Systems with Energy Constraints</article-title>
          . In: Third International Conference on Digital Society, ICDS'
          <fpage>09</fpage>
          . (
          <year>2009</year>
          )
          <fpage>266</fpage>
          -
          <lpage>271</lpage>
        </mixed-citation>
      </ref>
      <ref id="ref12">
        <mixed-citation>
          12.
          <string-name>
            <surname>Foures</surname>
            ,
            <given-names>D.</given-names>
          </string-name>
          ,
          <string-name>
            <surname>Albert</surname>
            ,
            <given-names>V.</given-names>
          </string-name>
          ,
          <string-name>
            <surname>Pascal</surname>
            ,
            <given-names>J.C.</given-names>
          </string-name>
          ,
          <string-name>
            <surname>Nketsa</surname>
            ,
            <given-names>A.</given-names>
          </string-name>
          :
          <article-title>Automation of SysML activity diagram simulation with model-driven engineering approach</article-title>
          .
          <source>In: Proceedings of the 2012 Symposium on Theory of Modeling</source>
          and Simulation
          <string-name>
            <surname>- DEVS Integrative M&amp;S Symposium</surname>
          </string-name>
          . TMS/DEVS '12, San Diego, CA, USA, Society for Computer Simulation International (
          <year>2012</year>
          )
          <volume>11</volume>
          :
          <fpage>1</fpage>
          -
          <lpage>11</lpage>
          :
          <fpage>6</fpage>
        </mixed-citation>
      </ref>
      <ref id="ref13">
        <mixed-citation>
          13. PNML.
          <article-title>org: (Reference site for the implementation of Petri Net Markup Language (PNML)) url</article-title>
          : http://www.pnml.org.
        </mixed-citation>
      </ref>
      <ref id="ref14">
        <mixed-citation>
          14.
          <string-name>
            <surname>Farail</surname>
            ,
            <given-names>P.</given-names>
          </string-name>
          ,
          <string-name>
            <surname>Goutillet</surname>
            ,
            <given-names>P.</given-names>
          </string-name>
          ,
          <string-name>
            <surname>Canals</surname>
            ,
            <given-names>A.</given-names>
          </string-name>
          ,
          <string-name>
            <surname>Le Camus</surname>
            ,
            <given-names>C.</given-names>
          </string-name>
          ,
          <string-name>
            <surname>Sciamma</surname>
            ,
            <given-names>D.</given-names>
          </string-name>
          ,
          <string-name>
            <surname>Michel</surname>
            ,
            <given-names>P.</given-names>
          </string-name>
          ,
          <string-name>
            <surname>Crégut</surname>
            ,
            <given-names>X.</given-names>
          </string-name>
          ,
          <string-name>
            <surname>Pantel</surname>
            ,
            <given-names>M.:</given-names>
          </string-name>
          <article-title>The TOPCASED project: a toolkit in open source for critical aeronautic systems design</article-title>
          . Ingenieurs de l'
          <source>Automobile</source>
          (
          <year>2006</year>
          )
          <fpage>54</fpage>
          -
          <lpage>59</lpage>
        </mixed-citation>
      </ref>
      <ref id="ref15">
        <mixed-citation>
          15.
          <string-name>
            <surname>Allilaire</surname>
            ,
            <given-names>F.</given-names>
          </string-name>
          ,
          <string-name>
            <surname>Bézivin</surname>
            ,
            <given-names>J.</given-names>
          </string-name>
          ,
          <string-name>
            <surname>Jouault</surname>
            ,
            <given-names>F.</given-names>
          </string-name>
          ,
          <string-name>
            <surname>Kurtev</surname>
            ,
            <given-names>I.</given-names>
          </string-name>
          :
          <article-title>ATL-eclipse support for model transformation</article-title>
          .
          <source>In: Proceedings of the Eclipse Technology eXchange workshop (eTX) at the ECOOP 2006 Conference</source>
          , Nantes, France. Volume
          <volume>66</volume>
          .,
          <string-name>
            <surname>Citeseer</surname>
          </string-name>
          (
          <year>2006</year>
          )
        </mixed-citation>
      </ref>
      <ref id="ref16">
        <mixed-citation>
          16.
          <string-name>
            <surname>Dwyer</surname>
            ,
            <given-names>M.B.</given-names>
          </string-name>
          ,
          <string-name>
            <surname>Avrunin</surname>
            ,
            <given-names>G.S.</given-names>
          </string-name>
          ,
          <string-name>
            <surname>Corbett</surname>
            ,
            <given-names>J.C.</given-names>
          </string-name>
          :
          <article-title>Patterns in property specifications for finite-state verification</article-title>
          .
          <source>In: Proceedings of the International Conference on Software Engineering</source>
          , IEEE (
          <year>1999</year>
          )
          <fpage>411</fpage>
          -
          <lpage>420</lpage>
        </mixed-citation>
      </ref>
      <ref id="ref17">
        <mixed-citation>
          17.
          <string-name>
            <surname>Alavi</surname>
            ,
            <given-names>H.</given-names>
          </string-name>
          ,
          <string-name>
            <surname>Avrunin</surname>
            ,
            <given-names>G.</given-names>
          </string-name>
          ,
          <string-name>
            <surname>Corbett</surname>
            ,
            <given-names>J.</given-names>
          </string-name>
          ,
          <string-name>
            <surname>Dillon</surname>
            ,
            <given-names>L.</given-names>
          </string-name>
          ,
          <string-name>
            <surname>Dwyer</surname>
            ,
            <given-names>M.</given-names>
          </string-name>
          ,
          <string-name>
            <surname>Pasareanu</surname>
            ,
            <given-names>C.</given-names>
          </string-name>
          : (Specification Patterns) url: http://patterns.projects.cis.ksu.edu.
        </mixed-citation>
      </ref>
    </ref-list>
  </back>
</article>