=Paper=
{{Paper
|id=Vol-3118/p06
|storemode=property
|title=FPGA Implementation of a BPSK Modulator with Frequency
Hopping
|pdfUrl=https://ceur-ws.org/Vol-3118/p06.pdf
|volume=Vol-3118
|authors=Francesco Beritelli,Giacomo Capizzi,Corrado Rametta,Christian Napoli
|dblpUrl=https://dblp.org/rec/conf/icyrime/BeritelliCRN21
}}
==FPGA Implementation of a BPSK Modulator with Frequency
Hopping==
https://ceur-ws.org/Vol-3118/p06.pdf
FPGA Implementation of a BPSK Modulator with Frequency
Hopping
Francesco Beritellia , Giacomo Capizzia , Corrado Ramettab and Christian Napolib
a
Department of Electrical, Electronic and Computer Engineering, University of Catania, Viale A. Doria 6, 95125, Catania, Italy
b
Department of Computer, Control and Management Engineering, Sapienza University of Rome, Via Ariosto 25, 00135, Rome, Italy
Abstract
PSK modulations are very widespread in communication due to their robustness to the noise. In order to avoid interference
or for anti-jamming purposes, frequency hopping may be applied. In this work we present an FPGA implementation of a
BPSK modulator based on frequency hopping. The results shows good performance, more than 300 MHz of clock system, low
area occupation and low power dissipation (about 100 mW).
Keywords
Frequency Hopping, DDS, BPSK, FPGA, Spread Spectrum, Anti-jamming
1. Introduction at regular intervals in a pseudo-random way through a
pre-established code. Several modern applications make
Phase-Shift Keying (PSK) modulations are the best known use of Frequency Hopping to avoid interference, among
and most used numerical modulations in the field of com- them, the most known is the Bluetooth technology [8]. If
munications. The information is encoded in the carrier several terminals transmit on the same carrier, collisions
phase which assumes discrete values as a function of the are created. By applying Frequency Hopping according
bits or sequence of bits to be transmitted. The signal to a certain law, this problem is avoided. Obviously only
amplitude and frequency remain constant. Since the in- those who transmit and receive know the sequence of
formation is coded in the phase, this type of modulation frequency jumps and where there should be interference
has an excellent robustness towards amplitude errors in a given instant, it will be of short duration because
of the received symbols [1, 2]. In modern applications at the next instant, the frequencies will most likely be
there was the necessity to strengthen the communication different. With the diffusion of the IoT, secure commu-
protocols mostly for avoiding interference both volun- nications will be always more required. Sensible data,
tary (such as the case of jammers, very used in electronic locally processed by smart nodes equipped with machine
warfare [3]) and involuntary (such as the transmission learning algorithms[9] (that nowadays find application in
of several devices on the same frequency [4]). One of the always more fields [10],[11],[12],[13],[14],[15],[16] must
most used technique useful to avoid these issues is the be transmitted over the internet in the safest way pos-
Spread Spectrum [5]. The Spread Spectrum was initially sible In such a context, FPGAs can be a powerful and
developed in the military field to avoid radio intercep- valuable ally for the de-centralization of computing as
tions. Originally, any type of transmission that guaran- for example in [17].
teed a non-stationary spectrum was considered a spread The paper is structured as follows: Section 2 gives a
spectrum. With the introduction of the Code Division brief introduction on PSK modulation, Section 2.1 gives
Multiple Access (CDMA) [6], the spread spectrum is gen- some info about frequency hopping and its implemen-
erated by multiplying the information by a code. Spread tation by using Digital Direct Synthesis, in Section 3
Spectrum can be also generated by using the frequency simulation and implementation results are shown, end,
hopping technique, the so called Frequency-Hopping finally, in Section 4 some conclusion are discussed.
Spread Spectrum (FHSS) [7]. As for CDMA, FHSS is a
transmission technique used to increase the bandwidth of
a signal. It consists in varying the transmission frequency 2. PSK Modulation
ICYRIME 2021 @ International Conference of Yearly Reports on There are several types of PSK modulation. Among the
Informatics Mathematics and Engineering, online, July 9, 2021 most used are:
" francesco.beritelli@.unict.it (F. Beritelli); gcapizzi@diees.unict.it
(G. Capizzi); rametta@diag.uniroma1.it (C. Rametta); • Binary phase-shift keying (BPSK): it associates
cnapoli@diag.uniroma1.it (C. Napoli) the two binary digits 1 and 0 with two different
0000-0003-2555-9866 (G. Capizzi); 0000-0002-3336-5853
(C. Napoli)
carrier phase values, such as 0° and 180°.
© 2021 Copyright for this paper by its authors. Use permitted under Creative
Commons License Attribution 4.0 International (CC BY 4.0).
• Quadrature phase-shift keying (QPSK): in this
CEUR
Workshop
Proceedings
http://ceur-ws.org
ISSN 1613-0073 CEUR Workshop Proceedings (CEUR-WS.org) case we have 4 equally spaced phases to represent
40
Francesco Beritelli et al. CEUR Workshop Proceedings 40–44
Figure 1: Time behavior of a BPSK modulation
An easy way to generate the carrier is the use of a
Digital Direct Synthesizer [18] based on a 2𝑁 locations
memory where the samples for the wave generation are
stored. The binary information, i.e. the shift phase, is
given by adding an offset to the read-address. Offset 0
means 0° phase (bit 0), offset 2𝑁 −1 means 180° phase
(bit 1). A simplified scheme of our system is depicted in
Fig.2.1.
In our experiments the number of bit N for the address
has been set to 10, as consequence the number of memory
locations is 1024. Also the number of bit of each memory
word is N=10 bit, but in general these two parameter can
be different. The tuning word is the input used to set the
carrier frequency following the law:
𝑁 · 𝐹𝑐𝑙𝑘
𝐹𝑜𝑢𝑡 = (1)
Figure 2: BPSK constellation 2𝑁
The input SEL is used to generate the binary informa-
tion: SEL=0 → bit 0, SEL=1 → bit 1.
2 bits.
• 8-PSK: similar to QPSK, but it uses 8 phases to
represent 3 bit.
3. System simulation and FPGA
Implementation
In [7] the authors present a frequency hopping system
based on Frequency Shift Key (FSK), in this work, we Before the implementation, the system has been simu-
focused our attention on PSK modulation. In detail, we lated first in floating point and then in fixed point by
implemented a BPSK modulatior but the developed sys- using Simulink. After the system simulation the system
tem is suitable for any PSK modulation. Fig.2 depicts the has been coded in VHDL and implemented in a Xilinx
time behavior of a BPSK modulation. The carrier phase Zynq 7020 FPGA. Fig.3 shows the exact correspondence
(b) changes at varying of binary signal (a). between the simulink simulation and the Xilinx Vivado.
In Fig.2, is instead shown the constellation of a BPSK. The Fig.3 shows the positive timing closure of the
system with a clock period of 3 ns corresponding to 333
MHz.
2.1. Frequency Hopping with Digital
About the power consumption, we did first an estima-
Direct Synthesis (DDS) tion without considering the switching activity of the
The aim of a frequency-hopping-based system is to jump circuit nodes (see Fig.3), and then we repeated the same
to different frequencies. An example is depicted in Fig.2.1, estimation by using the value of switching activity pro-
where are shown all 79 frequencies where a device Blue- vided by the simulation (see Fig.3). In the latter case, the
tooth may work. value depends on the input test vectors.
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Francesco Beritelli et al. CEUR Workshop Proceedings 40–44
Figure 3: Channel frequencies in Bluetooth communication
resources utilization on FPGA. The synthesis results are
shown in Fig.3
As can be seen, the resource utilization is very low. By
increasing the value of N, the resource utilization will in-
crease linearly with the exception of the memory used to
store the wave samples that will increase exponentially.
4. Conclusion
Figure 4: Developed System We propose the FPGA implementation of a BPSK modula-
tor based on frequency hopping. The system can be used
both for anti-jamming applications or to avoid collision
when two devices transmit on the same carrier. The sys-
tem has been tested with a clock frequency of 333 MHz
on a Xilinx Zynq 7020 device. The system makes use of a
very limited number of hardware resources with a power
dissipation of 120 mW.
Acknowledgments
This work has been supported by the project “Green-
TAGS” funded by the Italian Ministry of University and
Research within the PRIN founding scheme 2017 (CUP
B88D19003660001).
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