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    <journal-meta>
      <issn pub-type="ppub">1613-0073</issn>
    </journal-meta>
    <article-meta>
      <title-group>
        <article-title>22nd International Workshop SMT 2024 Proceedings</article-title>
      </title-group>
      <contrib-group>
        <contrib contrib-type="author">
          <string-name>Montreal</string-name>
        </contrib>
        <contrib contrib-type="author">
          <string-name>Canada</string-name>
        </contrib>
        <contrib contrib-type="author">
          <string-name>Afiliated with CAV-</string-name>
        </contrib>
        <contrib contrib-type="author">
          <string-name>Giles Reger</string-name>
        </contrib>
        <contrib contrib-type="author">
          <string-name>Yoni Zohar</string-name>
          <email>yoni.zohar@biu.ac.il</email>
          <xref ref-type="aff" rid="aff0">0</xref>
        </contrib>
        <contrib contrib-type="author">
          <string-name>Amazon Web Services (AWS)</string-name>
        </contrib>
        <contrib contrib-type="author">
          <string-name>CEUR Workshop Proceedings</string-name>
        </contrib>
        <aff id="aff0">
          <label>0</label>
          <institution>Bar Ilan University</institution>
        </aff>
      </contrib-group>
    </article-meta>
  </front>
  <body>
    <sec id="sec-1">
      <title>-</title>
      <p>The 22nd International Workshop on Satisfiability Modulo Theories was held in Montreal,
Canada, on July 22nd and 23rd in association with the International Conference on Computer
Aided Verification (CAV-36).</p>
      <p>The SMT workshop is an annual event dedicated to Satisfiability Modulo Theories (SMT).</p>
      <p>Determining the satisfiability of first-order formulas modulo background theories, known
as the Satisfiability Modulo Theories problem, has proved to be an enabling technology for
verification, synthesis, test generation, compiler optimization, scheduling, and other areas.</p>
      <p>The success of SMT techniques depends on the development of both domain-specific decision
procedures for each background theory (e.g., linear arithmetic, the theory of arrays, or the
theory of bit-vectors) and combination methods that allow one to obtain more versatile SMT
tools, usually leveraging Boolean satisfiability (SAT) solvers. These ingredients together make
SMT techniques well-suited for use in larger automated reasoning and verification eforts.</p>
      <p>The aim of the workshop is to bring together researchers and users of SMT tools and
techniques. Relevant topics include but are not limited to:
• Decision procedures and theories of interest
• Combinations of decision procedures
• Novel implementation techniques
• Benchmarks and evaluation methodologies
• Applications and case studies
• Theoretical results</p>
      <p>SMT 2024 featured invited talks by Sophie Tourret from INRIA and Mathias Preiner from
Stanford University, and the presentation of 12 peer-reviewed papers. The workshop received 13
submissions, out of which 12 were accepted. Each submission was reviewed by three program
committee members. Of the 12 accepted submissions, seven are published in this volume: three
as original papers, and four as extended abstracts. The remaining five were submitted to the
workshop for presentation only. For one of them, the authors include the paper abstract in this
volume.</p>
      <p>We would like to thank the program committee, the subreviewers, the authors, the invited
speakers, the SMT-COMP organizers, workshop participants and the SMT Steering Committee
for their contribution to the workshop. We would further like to thank the CAV organizers for
hosting the workshop, EasyChair for the availability of their conference system, and CEUR for
their help to publish these proceedings.</p>
      <p>SMT 2024 was sponsored by AWS, Halmos, and Ethereum Foundation. We are grateful for
their generosity in supporting the workshop.</p>
    </sec>
    <sec id="sec-2">
      <title>Giles Reger and Yoni Zohar Co-chairs, SMT 2024</title>
      <p>Program Committee</p>
      <sec id="sec-2-1">
        <title>Program Chairs</title>
        <sec id="sec-2-1-1">
          <title>Giles Reger, AWS</title>
          <p>Yoni Zohar, Bar Ilan University</p>
        </sec>
      </sec>
      <sec id="sec-2-2">
        <title>Program Committee</title>
        <sec id="sec-2-2-1">
          <title>Katalin Fazekas, TU Wien</title>
          <p>Viktor Kuncak, Ecole Polytechnique Fédérale de Lausanne
Ahmed Irfan, SRI International
Aina Niemetz, Stanford University
Andrew Reynolds, University of Iowa
Daniela Kaufmann, TU Wien
Haniel Barbosa, Universidade Federal de Minas Gerais
Nadia Labai, Amazon
Clark Barrett, Stanford University
Alexander Nadel, Technion and Intel
Philipp Rümmer, University of Regensburg
Nestan Tsiskaridze, Stanford University
Guilherme Toledo, Bar Ilan University
Yannick Moy, AdaCore
Martin Suda, Czech Technical University in Prague
Stéphane Graham-Lengrand, SRI International
François Bobot, CEA
Mate Soos, Ethereum Foundation
Nikolaj Bjørner, Microsoft</p>
        </sec>
      </sec>
      <sec id="sec-2-3">
        <title>Subreviewers</title>
      </sec>
    </sec>
    <sec id="sec-3">
      <title>Enrico Lipparini, University of Genoa</title>
      <p>Thomas Hader, TU Wien</p>
      <sec id="sec-3-1">
        <title>Invited Talks</title>
      </sec>
      <sec id="sec-3-2">
        <title>Regular Papers</title>
        <p>The Hows and Whys of Higher-Order SMT . . . . . . . . . . . . . . . . . . . . . . . 1</p>
        <p>Sophie Tourret,
Challenges in Bit-Vector Reasoning . . . . . . . . . . . . . . . . . . . . . . . . . . . 2</p>
        <p>Mathias Preiner
An SMT-LIB Theory of Finite Fields . . . . . . . . . . . . . . . . . . . . . . . . . . . 3</p>
        <p>Thomas Hader and Alex Ozdemir
Reconstruction of SMT proofs with Lambdapi . . . . . . . . . . . . . . . . . . . . . 13</p>
        <p>Alessio Coltellacci, Stephan Merz and Gilles Dowek
Arrays Reasoning in MCSat . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 24</p>
        <p>Ahmed Irfan and Stephane Graham-Lengrand</p>
      </sec>
      <sec id="sec-3-3">
        <title>Extended Abstracts</title>
      </sec>
      <sec id="sec-3-4">
        <title>Presentation-Only Papers (Abstracts)</title>
      </sec>
    </sec>
  </body>
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          <article-title>CSB: A Counting and Sampling tool for Bit-vectors</article-title>
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          <article-title>Minimal logic detection and exporting smtlib problems with Dolmen .</article-title>
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          <article-title>A Bit-vector to Integer Translation with bv2nat and</article-title>
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            <given-names>nat2bv . . . . . . . . . . . . . . 53 Max</given-names>
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          and Matthias Heizmann
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          <string-name>
            <surname>An SMT theory for N-Indexed</surname>
            <given-names>Sequences . . . . . . . . . . . . . . . . . . . . . . . . 64 Hichem</given-names>
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          <string-name>
            <surname>Rami Ait El Hara</surname>
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          , François Bobot and Guillaume Bury
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      <ref id="ref5">
        <mixed-citation>
          <string-name>
            <surname>Layered</surname>
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          and
          <article-title>Staged Monte Carlo Tree Search for SMT Strategy Synthesis</article-title>
          . . . . . . 75
          <string-name>
            <given-names>Zhengyang</given-names>
            <surname>Lu</surname>
          </string-name>
          , Stefan Siemer, Piyush Jha, Joel Day, Florin Manea and Vijay Ganesh
        </mixed-citation>
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</article>