=Paper=
{{Paper
|id=Vol-4106/short6
|storemode=property
|title=Dataflow-based FPGA Accelerators Generation via MLIR and Multi-dataflow Composer tool
|pdfUrl=https://ceur-ws.org/Vol-4106/short6.pdf
|volume=Vol-4106
|authors=Mohammad Cheshfar,Jiahong Bi,Francesco Ratto
}}
==Dataflow-based FPGA Accelerators Generation via MLIR and Multi-dataflow Composer tool==
None