Junction gate field - effect transistors have a significant role in the modern electronics. Simulation of the electronic schematics is a crucial part of the modern devices development. At the present time an existent model are used. A drawbacks of the exiting JFET models, with are commonly used during electronic schematics simulation a described. For the tasks of precision simulation the simple approximation functions and switching conditions lead to accuracy loss. A general purpose and specialized hardware and software complex was created to acquire measurement data. This measurement complex gives as possibility to acquire measurement data in automatic and semi-automatic modes. A bulk amount of data about selected JFET species was collected. According to this data a new model was proposed. This model allows us identify parameters in sequence, which significantly decreases the possibility of the identification errors. Proposed model requires more complex calculations to achieve results, and more data to conduct parametric identification. But as the result, new model provides better agreement with experimental data, especially in low-voltage regimes. New model allows us to decrease simulation error level from the 20% to 1-5%. The proposed model provides better qualitative conforming to the experimental data.
In modern electronics schematics, junction-gate field-effect transistors (JFETs) are not as
commonly used separately as, for example, field-effect transistors with an isolated gate (MOSFETs).
On the other hand, JFETs are widely used as part of more complex structures, such as the input
stages of operational amplifiers with high input impedance, current sources in measurement
equipment, and miscellaneous low-current sensors [
0000-0001-5304-4144 (Vik. Hnatushenko), 0000-0003-1139-1580 (A. Guda), 0009-0001-7239-2467 (A. Zimoglyad); 00000002-4367-385X (A. Zhurba)
© 2025 Copyright for this paper by its authors. Use permitted under Creative Commons License Attribution 4.0 International (CC BY 4.0).
The possibility of essential current control without significant current in the control circuit without tending to on/off mode makes these devices preferable in the satellites, small IoT devices and wearable equipment, where power sources have really restricted capabilities. Therefore, creating new models with increased accuracy is an important task in the design of modern electronic devices, especially when limiting power consumption.
Obliviously, a formidable amount of models are used with clear success during design and
development. And during these processes well-known JFET models are used [
However, most of these models, especially used in the well-known electronic circuits simulation
software, like those based on the ng-spice simulation engine [
As an example, let’s examine Id(Vgs) characteristic and its derivative for the BF-245C JFET. This data was acquired by the qucs-s [27] simulation software, which, in turn, uses ngspice engine.
As we can see, this plot consists of three distinct parts. While the first (cut-off) and the second (quadratic) parts have good confirmation with the real world, the third region, which is represented by the quadratic dependence in this model, not so precisely represents the real device behavior. One of the significant features of the JFET is near to linear current dependence in this range up to break-down. The plot on the fig. 1 shows, that model, used in the ngspice engines, have parabolic characteristic in this area. Moreover, different JFETs demonstrate distinctive behavior at the junction area between send and third parts.
Another essential phenomena, which is not covered by this model, is dependence of the cut-off voltage (Vgs0) from the drain-source voltage (Vds). The existence of this dependence is well-known, but not represented in the existent model.
One of the significant limitations of the existent models is the extremely simplified object representation and boundary conditions. Usually assumed, that channel has a simple form of rectangular thin film. The gate junction is assumed to be a flat one-dimension structure. Real devices now have a more complex structure. Moreover, the realization details are not publicly available. Even with these details assumed to be known, it is required a supercomputer and elaborated quantum simulation software to achieve the correct result. This approach is not suitable for real electronic schematics simulation, where simple and fast calculated algorithms are required.
In accordance with the above, the research goals are treated as follows: 1. Provide a simple static JFET model, suitable for the electronic schematics simulation and capable to represent more features of the real device. The new model should provide a better match with experimental data, possibly at the expense of increased model complexity. 2. Develop a method to identify the parameters of this model, preferable with minimal human interaction. This method must provide model coefficients with minimal human interaction, and, consequently, lower error level.
Development of this class of models is impossible without a bulk amount of measured data. Handmade measurements are theoretically possible, but error-prone and amount of spent time will be enormous. So, to provide the required amount of experimental data special programmable measurement equipment must be created. We must take into account, that this data is wrangling and subjected to numerous errors.
First of all, we need to determine the measured values and the corresponding ranges. The set of values to measure is limited: drain-source voltage (Vds), gate-source voltage (Vgs) and drain current (Id). Moreover, the voltages under consideration must be not only measured, but controlled in the given ranges.
The ranges of the measured and/or controlled values are defined by the devices under investigation. To provide wide band of parameters, not crossing the borders of available resources, the following set of low-power JFETs was chosen: BF245B [28], J111 [29], J112 , MMBF4391 [30]. This set provides an essential range of Vgs0 values, slightly different forms of the dependencies under consideration, but the maximum values are limited enough to be measured by the available and designed equipment. The working Vgs range is −10..0 V. The maximum drain current, according to datasheets, is roughly 100 mA. The drain-source voltage is limited to 30 V. This range is not so convenient to control, but the over power limitation does not give us the possibility to use the full voltage range. On the one hand, this fact slightly limits model applicability. On the other hand, this gives us a chance to use already created equipment as a part of the measurement system.
The proposed central part of the measurement system is developed programmable control and measurement system “cube” (fig 2). This system provides both manual and programmable control and measurement of such values: 2 analog output channels with −10..10 V range (12 bit resolution), 4 analog input −9..9 V range (16 bit resolution, high impedance), 8 “slow” digital input channels, 8 “slow” digital output channels, 4 “fast” digital input channels with timer-based measurement capabilities, 4 “fast” digital output channels with PWM, LWM.
The core of this system is a STM32F407VGT microcontroller. The firmware provides us the possibility not only to manually measure and control required values, but to do this under program control. As the user-visible programming language the C-alike interpreter is used. It was derived from open-source “pico-c” project [31] and adopted to measurement needs. Programs may be loaded both with UART interface and USB flash drive. The results may be stored the same way, not counting the LCD screen.
Taking into account the characteristics above, we can measure both Vgs and Vds by the “cube” directly via analog input channels. The Vgs value we can control by the analog output channel without extra parts. Unfortunately, the analog output channel is not powerful enough to drive JFETs at full required power. So, an external power supply RD6006P [32] was used to drive Vds. This decision adds some amount of manual control during measurements, but this amount was acceptable.
To measure the Id value, an additional device was required. To measure current on the “high side” across a small (0.1–1 Ohm) shunt resistor without significant errors, a specialized amplifier board with the AD8221 — a precision instrumentation amplifier [33,34] — was developed and used (Fig. 3). A high common-mode rejection ratio (approximately 130 dB) allows us to measure the voltage drop across a shunt resistor on the high side with negligible errors. Measuring current on the low side under these conditions would lead to significant errors in Vgs measurement. After amplification (×99.97), the current signal was measured by an analog input channel. All measurement and control channels were calibrated using a precision SDM3035 multimeter. The calibration results show that in the range of –9 to 9 V, the error does not exceed 0.1% if the thermal conditions are stable. However, outside of this range, the error grows significantly, up to full phase reversal. This can be mainly explained by the limited input range of the TL072 operational amplifier in the input stage of the measurement block. The main source of current measurement error was assumed to be the shunt resistor's thermal instability. For the reasons above, the total measurement error does not exceed 1%. It is worth mentioning that the input stage of the TL072 amplifier is based on an integrated JFET pair, which provides high input impedance and really low non-linear distortions.
The measurements were conducted using the following procedure. First of all, a sample JFET was connected to the measurement system. Then, under manual control a small amount of data points was acquired. During these tests critical checks like maximum power, junction temperature were conducted. If the results of these tests were not satisfactory, then the voltage ranges were adjusted. Then a program, loaded on the flash drive was used to semi-automatically iterate over Vds and Vgs. On the outer loop, the Vds value was set manually by the hint shown on the LCD screen. Inner loop (Vgs) was iterated fully automatically. On each measurement point all voltages (including power supply) and Id current was measured and placed in the UART output stream. Herewith, given and measured control voltages were compared, and in the case of more than negligible discrepancies − measurement process was interrupted with error message. On the controlling computer side all data was stored to the file by the “picocom” − terminal program. All data was represented in the textual form − one line per measurement point. The acquired Id(Vds,Vgs) dependencies in the 3-D form are represented in the figure 4.
The main goal of this research is to provide suitable for the declared goals Id(Vds,Vgs) dependence.
According to numerous previous analytical and approximation-based studies [
First of all, we should obtain Vgs0(Vds) dependence − as cut-off voltage Vgs0 can be measured
independent of all other parameters. This dependence is often neglected, but ignorance of this
really small change can lead to wrong identification of other parameters. But the measurement of
Vgs0 using its formal definition can provide us wrong results − as small current fluctuations can be
treated as the start of real current. To achieve more adequate results, we can use the known
fact [
I d (V gs )≈{ k q (V gs−V gs 0)2 , otherwise . (1)
We should obtain Vgs0 and kq values for every observed Vds value. To simplify expressions, we will denote Vgs−Vgs0 as Vgr.
Examination of the acquired in the previous step dependence Vgs0(Vds) for all samples allows up to make a conclusion, what a simple second-order polynomial is enough for adequate representation (fig. 6).
V gs 0 (V ds )≈ags 0+V ds bgs 0+V 2ds cgs 0 , (2) where ags0, bgs0, cgs0 − coefficients, describing particular JFET. In the datasheets the ags0 coefficient denoted as Vgs(off), other coefficients are ignored in most cases.
From the representation (1) we can derive one more approximation: kq(Vds) (fig. 7).
After several iterations, the following approximation was chosen for kq(Vds): k q (V ds )=akq ( tanh ( V ds )+ckq V ds)
V kq where akq, Vkq, ckq − parameters, obtained during function fitting.
Having obtained this starting point, we must choose the next stage: approximate Id(Vgs) with
constant Vds and combine these approximations over different Vds, or in the opposite direction. Both
approaches were tested, and the first one demonstrated best results. So, let’s examine the Id(Vgs)
form. Or better, Id(Vgr) to use results from (1). In most non-degenerate cases we can observe 3 parts:
cut-off, quadratic part, and near-no-linear part. The transition from cut-off to quadratic part can be
done without problem. It seems natural to make transmission from the quadratic to linear part with
the condition of equal derivatives in the left and right side from the junction point. This approach
leads to errors − may be not significant in common cases, as on frequently used schematics this
region is often avoided [
2 (V ds - cka )
2 dka ,
I d (V gr , V gs1 , k q , k a , k b , k c , xd ) = { The results of such approximation are presented on figure 8. 0 ,
2 k q V gr k a + k b V gr - k c √ max ( xd - V gr , 0 ) (4) (5) (6) (7) (8) (9) (10) (11) (11) (12)
V gr < 0
V gr ≥ V gs1 0 < V gr < V gs1 (13)
As was mentioned before, these approximations make sense only for one fixed Vds. To provide a more general and common model, we must try to find quite simple, but usable dependencies for all coefficients from (4).
The kb(Vds) approximation (5) is not a trivial, but gives us good results:
The results are represented on figure 9.
V gs1 = k gs1( tanh ( V ds - V gs10 )+ k gs1l (V ds - V gs10)).
V gs11 (14)
The results are represented on figure 10. These results demonstrates, that using Vds value as Vgs1 is possible only in very rare conditions, as the experimental Vgs1(Vds) curves, in general, have the only intersection point.
All of the coefficients in equations (4)—(14) should be provided in the case of new model utilization. The equations under consideration have relatively complex form, but provide us sufficient approximation level for the essentially different samples.
To verify the usability of the new model we need to compare experimental data with simulation, taking into account coefficients, obtained in one point, but using (5)−(7) expressions. It is impossible to correctly represent simulation errors on the one plot, so slices on Vds=const and Vgs=const will be represented.
In the figure 12 comparison results was presented at Vgs=const.
In the case of the using standard SPICE model parameters, the results of the simulations were incomparable – even they cannot be represented in the same plot with experimental data. To achieve satisfactory results with old model, the corresponding parameters from the new model were used. This is not the sign of the unusability of the old model – precision simulation often requires parameters adjustment. But even with these adjustments the proposed model has significant difference from the classic one. The difference in the Id values reached 20%, whereas new model give near the 5% in the worst case. Moreover, new model provided qualitative better conforming to the experimental data, which, in turn, gives us the possibility not only to acquire more precise simulation results in the common ranges, but to extrapolate simulation out of these bounds.
In the figure 13 comparison results was presented at Vds=const
These plots demonstrate not so eye-visible differences in comparison with the previous ones, but the common result is the same. This is not unusual, as they uses the same data, but in the different point of view. The error levels have the save values too.
It is worth to take into account, that presented plots are the small and less precise part of the overall experimental data. For the each of the four samples 40—200 data sets (slices) where acquired and simulated. Most of these slices demonstrate approximately 1% of the simulation error. As an exception to the rule, it should be noted that measurements are made at very low currents, when the relative accuracy of the change drops, as well as at extreme current values, when heating becomes significant.
The curve comparison results allow us to statement, that new model provides not perfect, but really good approximation for the different JFET samples. Some of the required features was acquired by the creation process, other – as a result of sequential approximation. The exact form of equations (4)–(13) may be treated as somewhat “magical”, but it was created after large amount of “try—check” iterations. As a drawback, new model requires more parameters, but it is unavoidable in the case of different complex dependencies.
The similar results were obtained with other voltage ranges and different samples. No essential simulation errors were detected. On the 3-D plots only the minimal eye-visible differences can be observed. These figures are not provided here, as no distinct visual differences are observed in comparison with Figure 4.
Existing JFET models are generally adequate, but do not provide us with some significant properties, especially near boundary conditions. The new model allows us to decrease errors and provides better qualitative conformity with the experimental data. The proposed method for the sequential measurements of the model parameters essentially simplifies the process, reducing the number of simultaneously calculated parameters. The proposed model, in spite of some drawbacks, provides a better level of conformity with this real data. The main drawback, in our opinion, is the somewhat artificial origin of equations (4)–(17). Also, it is worth taking into account that due to equipment limits, the thermal characteristics of the new model still remains to be investigated. This can be a task for future research. The hardware and software developed during this research can supply researchers with the required background to conduct measurements in a nearly automatic mode and collect data for both model synthesis and verification. Moreover, the acquired results can allow us to improve measurement hardware to diminish the detected drawbacks.
Intelligent Information Technologies & Systems of Information Security, Vol-3156, 587–598, 2022. http://ceur-ws.org/Vol-3156/?fbclid=IwAR25gkEK7r5iMV4jK7WNyR_yvXq_bXrCEb6DaN2xbHLnJ8Rr2dLOr6T1Jc. [19] V. Kuznetsov, Microstrip Line Modeling Taking into Account Dispersion Using a General
Purpose SPICE Simulator, Low Power Electron. Appl 15, 42, (2025). doi:10.3390/jlpea15030042. [20] Nałęcz, M., SPICE-Compatible Circuit Models of Multiports Described by Scattering Parameters with Arbitrary Reference Impedances, Electronics 13, 2260, (2024). doi:10.3390/electronics13122260. [21] Kelp K, Wright D, Stephens J, Dickens J, Mankowski J, Shaw Z, Neuber A., Modeling Pulsed Magnetic Core Behavior in LTspice, Electronics, 14(12) (2025) 2335. doi:10.3390/electronics14122335. [22] Kelp, K., Wright, D., Stephens, J.; Dickens, J.; Mankowski, J., Shaw, Z., Neuber, A., Modeling Pulsed Magnetic Core Behavior in LTspice, Electronics 14, 2335, (2025). doi:10.3390/electronics14122335. [23] Shekh-Abed, A., Enhancing Learning in Microelectronic Circuits: Integrating LTspice Simulations and Structured Reflections in a Design Project, Educ. Sci 15, 1045, (2025). doi:10.3390/educsci15081045. [24] Kumar, Kundan Saxena, Vikram, LTspice Simulation Analysis for Loss Estimation of GaN MOSFET based Class E Resonant Inverter, 16, (2022). doi:10.1109/GlobConPT57482.2022.9938227. [25] H. Hackl, J. R. Lopera, D. Klien, M. Gholizadeh, S. Sadeghi, B. Auinger, On the Simulation of Conducted Emission of a Flyback Converter using LTSpice, 2024 International Symposium on Electromagnetic Compatibility, EMC Europe, Brugge, Belgium, (2024) 682-687. doi:10.1109/EMCEurope59828.2024.10722256. [26] K. Kanakgiri, D. Ishan Bhardwaj, B. Sai Ram, S. V. Kulkarni, A Circuit-Based Formulation for Soft Magnetic Materials Using the Jiles–Atherton Model, in IEEE Transactions on Magnetics, vol. 60, no. 10, 2024, pp. 1-7, Art no. 7301107. doi:10.1109/TMAG.2024.3452593. [27] M. Brinson, V. Kuznetsov, Extended behavioural device modelling and circuit simulation with Qucs-S, International Journal of Electronics 105(3), (2017) 412–425. doi:10.1080/00207217.2017.1357764. [28] BF245A; BF245B; BF245C N-channel silicon field-effect transistors, Netherland: NXP
Semiconductors, 1996. URL: https://www.nxp.com/docs/en/data-sheet/BF245A-B-C.pdf. [29] J111, J112 JFET Chopper Transistors N−Channel – Depletion J111, J112, J113 datasheet. ON
Semiconductor, 2006. URL: https://www.onsemi.com/pdf/datasheet/j111-d.pdf. [30] JFET Switching Transistors N-Channel MMBF4391L, 14th ed, Onsemi, 2024. URL: https://www.onsemi.com/download/data-sheet/pdf/mmbf4391lt1-d.pdf. [31] J. Poirier, A very small C interpreter, 2015. URL: https://github.com/jpoirier/picoc. [32] RD6006 – a buck step down direct voltage power supply unit, Joy-it, 2020. URL: https://joyit.net/en/products/jt-rd6006. [33] Precision Instrumentation Amplifier Precision Instrumentation Amplifier AD8221, Norwood: Analog Devices, 2011. URL: https://www.analog.com/media/en/technical-documentation/datasheets/ad8221.pdf [34] P. Mohindru, Electronic Circuit Analysis using LTSpice XVII Simulator: A Practical Guide for Beginners (1st ed.), CRC Press. 2021. doi:10.1201/9781003199489.