Organized in conjunction with MoDELS'08 11th International Conference on Model Driven Engineering Languages and Systems
Workshop Proceedings Table of Contents.....................................................................................................................................3 MultiͲ Level Power Consumption Modelling in the AADL Design Flow for DSP, GPP, and FPGA VTSͲ based Specification and Verification of Behavioral Properties of AADL Models D. Monteverde (Universidad Argentina de la Empresa and Universidad de Buenos Aires, Argentina), A. Olivero (Universidad Argentina de la Empresa, Argentina), S. Yovine (VERIMAGͲ CNRS, France), and V. Braberman (Universidad de Buenos Aires, Argentina) ................................. 23 Translating AADL into BIPͲ Application to the Verification of RealͲ time Systems
M.Y. Chkouri, A. Robert, M. Bozga, and J. Sifakis (VERIMAG, France) ............................................. 39
G.v. Bochmann (SITE, Canada) ......................................................................................................... 55
T.H. Feng and E.A. Lee (University of California, USA) ..................................................................... 71 ISE language: The ADL for Efficient Development of Cross Toolkits
N. Pakulin, and V. Rubanov (Institute for System Programming of the Russian Academy of Sciences, Russia) ............................................................................................................................................... 87 Towards ModelͲ Based Integration of Tools and Techniques for Embedded Control System Design, Verification, and Implementation
J. Porter, G. Karsai, P. Völgyesi, H. Nine, P. Humke, G. Hemingway, R. Thibodeaux, and J.
Sztipanovits (Vanderbilt University, USA) ........................................................................................ 99 Modeling RadioͲ Frequency FrontͲ Ends Using SysML: A Case Study of a UMTS Transceiver
S. Lafi, R. Champagne, A.B. Kouki, and J. Belzile (École de Technologie Supérieure, Canada) ...... 115 From HighͲ Level Modelling of Time in MARTE to RealͲ Time Scheduling Analysis
M.Ͳ A. PeraldiͲ Frati, and Y. Sorel (I3S, France) ................................................................................ 129 A Reinterpretation of Patterns to Increase the Expressive Power of ModelͲ Driven Engineering Approaches
M. Bordin (AdaCore, France), M. Panunzio, C. Santamaria, and T. Vardanega (University of Padua, Italy) ................................................................................................................................................ 145 Foreword The development of embedded systems with real‐time and other types of critical constraints implies handling very specific architectural choices, as well as various types of critical non‐ functional constraints (related to real‐time deadlines and to platform parameters, such as energy consumption and memory footprint). The last few years have seen a growing interest in (1) using precise (preferably formal) domain‐specific models for capturing such dedicated architectural and non‐functional information, and (2) using model‐driven engineering (MDE) techniques for combining these models with platform independent functional models to obtain a running system. As such, MDE can be used as a means for developing analysis oriented specifications that represent the design model at the same time. The objective of this workshop is to bring together researchers and practitioners interested in all aspects of model‐based software engineering for real‐time embedded systems. We target this subject at different levels, from modelling languages and related semantics to concrete application experiments, from model analysis techniques to model‐based implementation and deployment. In particular the workshop focus on the following: • • •
Architecture description languages (ADLs). Architecture models are crucial elements in system and software development, as they capture the earliest decisions that have a huge impact on the realisation of the (non‐functional) requirements, the remaining development of the system or software, its deployment, etc. In particular, we are interested in examining: o the position of ADLs in an MDE approach o the relation between architecture models and other types of models used during requirement engineering (e.g., SysML), design (e.g., UML), etc. o techniques for deriving architecture models from requirements, and deriving high‐level design models from architecture models o verification and early validation using architecture models Domain specific design and implementation languages. To achieve the high confidence levels required from critical embedded systems through analytical methods, specific languages with particularly well‐behaved semantics are often used in practice, such as synchronous languages and models (Lustre/SCADE, Signal/Polychrony, Esterel), time triggered models (TTA, Giotto), scheduling‐oriented models (HRT‐UML, Ada Ravenscar), etc. We are interested in examining the model‐ oriented counterparts of such languages, together with the related analysis and development methods. Languages for capturing non‐functional constraints (UML‐MARTE, AADL, OMEGA, etc.) •
Component languages and system description languages (SysML, BIP, FRACTAL, Ptolemy, etc.). We received 16 submissions from 8 different countries, of which 10 papers were accepted for the workshop. We hope that the contributions for the workshop and the discussions during the workshop will help to contribute and provide interesting new insights in Model Based Architecting and Construction of Embedded Systems. The ACESMB 2008 organising committee, Iulian Ober, Stefan Van Baelen, Susanne Graf, Mamoun Filali, Thomas Weigert, Sébastien Gérard, September 2008. Acknowledgments The Organising Committee of ACESMB 2008 would like to thank the workshop Program Committee for their helpful reviews.
Nicolas Belloir (LIUPPA, France) JeanͲ Michel Bruel (LIUPPA, France) Agusti Canals (CS, France) JeanͲ Marie Farines (UFSC, Brasil) Peter Feiler (SEI, USA) Mamoun Filali (CNRS IRIT, France) Robert France (CSU, USA) David Garlan (CMU, USA) Pierre Gaufillet (Airbus, France) Sébastien Gérard (CEA LIST, France) Susanne Graf (VERIMAG, France) Tom Henzinger (EPFL, Switzerland) Bruce Lewis (US Army, USA) John Mettenburg (Rockwell Collins, USA) Alan Moore (The Mathworks, UK) Iulian Ober (University of Toulouse, France) Isabelle Perseil (Telecom ParisTech, France) Dorina Petriu (Carleton University, Canada) Bernhard Rumpe (TU Braunschweig, Germany) Douglas C. Schmidt (Vanderbilt University, USA) Bran Selic (Malina Software, Canada) JeanͲ Bernard Stefani (INRIA, France) Richard Taylor (UCI, USA) Martin Törngren (KTH Stockholm, Sweden) Stefan Van Baelen (K.U.Leuven, Belgium) Tullio Vardanega (University of Padua, Italy) Eugenio Villar (Universidad de Cantabria, Spain) François Vernadat (LAAS, France) Thomas Weigert (Missouri S&T, USA) Tim Weilkiens (oose GmbH, Germany)
Sergio Yovine (VERIMAG, France) This workshop is organised as an event in the context of
The ISTͲ 004527 ARTIST2 Network of Excellence on Embedded Systems Design The research project EUREKAͲ ITEA SPICES (Support of Predictable Integration of mission Critical Embedded Systems)