cvb.authors: Eric Senn,Johann Laurent,and Jean-Philippe Diguet
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cvb.title: Multi-Level power consumption modelling in the AADL design flow for DSP,
  GPP, and FPGA
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cvb.vol_number: '503'
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spt.title: Multi-Level power consumption modelling in the AADL design flow for DSP,
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spt.volume:
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  date: '2009-09-18'
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  description: Proceedings of ACES-MB 2008 workshop
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  number: 503
  title: ACES-MB 2008 Model Based Architecting and Construction of Embedded Systems
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