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  <front>
    <journal-meta />
    <article-meta>
      <title-group>
        <article-title>A Data-Centric Approach to Deadlock Elimination in Business Processes</article-title>
      </title-group>
      <contrib-group>
        <aff id="aff0">
          <label>0</label>
          <institution>Institut für Informatik, Humboldt Universität zu Berlin</institution>
          ,
          <addr-line>Unter den Linden 6, 10099 Berlin</addr-line>
          ,
          <country country="DE">Germany</country>
        </aff>
      </contrib-group>
      <abstract>
        <p>In this paper, we sketch a data-centric approach to avoid deadlocks of a business process. If dependencies between data values are neglected or modelled incorrectly, this can lead to errors in the control flow of the business process. We address the problem of detecting deadlocks which are caused by the improper handling of data. We show by example, how these deadlocks can be detected by means of a symbolic reachability graph. Under certain conditions, we can derive the correct dependency between the involved data values. This allows to modify the business process in a way so that the detected deadlocks will not be reachable.</p>
      </abstract>
    </article-meta>
  </front>
  <body>
    <sec id="sec-1">
      <title>Background</title>
      <p>
        The design of business processes is an error prone task. This motivates the use of
formal verification to help a business process designer to avoid certain kinds of
errors. Models of business processes can be transformed into more formal models
like process algebra [
        <xref ref-type="bibr" rid="ref4">4</xref>
        ] or Petri nets [
        <xref ref-type="bibr" rid="ref7 ref9">9,7</xref>
        ]. A business process can also be designed
as a Petri net directly (e. g. with CPN Tools [
        <xref ref-type="bibr" rid="ref10">10</xref>
        ]). These models can be checked
for soundness and other properties by means of formal verification.
      </p>
      <p>
        However, little attention has been paid to the influence of data on the
correctness of a business process. Most formal models represent data only in a highly
abstracted and imprecise form. Models that explicitly include data usually have
a clear separation between the control flow part and the data part [
        <xref ref-type="bibr" rid="ref3">3</xref>
        ]. Often, the
dependencies between data flow and control flow are not very complex, i. e. there
is only a small set of values a data item can have. For many the properties in
focus of recent research, the actual value of a data item is not important [
        <xref ref-type="bibr" rid="ref12">12</xref>
        ], [
        <xref ref-type="bibr" rid="ref13">13</xref>
        ]
and primarily concerns the order in which read and write activities on variables
are carried out. E. g., reading an uninitialized value is considered an error.
      </p>
      <p>
        In this paper, we consider processes that are heavily influenced by data and
might be unable to finish a task for some combinations of data values. Technically,
this means that a deadlock is reachable under some conditions. Our goal is to
find out those harmful combinations of data values and describe the relation
the value must adhere to in order to avoid a deadlock (e. g. in the form of a
function) and use this information to fix the process. Concerning this aspect,
our approach is more general than the approach of [
        <xref ref-type="bibr" rid="ref1">1</xref>
        ] which does not deal with
relations between data values.
      </p>
      <p>
        We represent a business process by a High-Level Petri net [
        <xref ref-type="bibr" rid="ref5">5</xref>
        ]. A High-Level
Petri net is an extension of a Petri net where places are typed, tokens have values
of the respective type and arcs are inscribed with terms. When a transition fires,
values are assigned to the variables appearing in the inscriptions of adjacent arcs.
The evaluation of the inscriptions determines which values are produced and
consumed. The terms are evaluated with a fixed interpretation (note that the
Petri net is not a schema in the sense of [
        <xref ref-type="bibr" rid="ref11">11</xref>
        ]). We do not exploit restrictions on
the Petri net’s structure that a certain business process modelling language might
impose. This allows us to handle more general models (e. g. as obtained from
CPN Tools). We assume that the Petri net is bounded, acyclic and fulfils some
technical requirements of minor importance which do not restrict the expressivity
and will not be mentioned here. The restriction to acyclic nets can be relaxed
as long as computational issues are neglected. We assume that the set of values
used by the Petri net can be so large that an explicit enumeration would be
computationally inefficient.
      </p>
      <p>start
x
id(x)</p>
      <p>y
order</p>
      <p>id
exp.
prod.</p>
      <p>receive [x=y]
x
stop
y product id-1(y)
manufacture
start
x
id(x)</p>
      <p>y
order</p>
      <p>id
exp.
prod.</p>
      <p>receive [x=y]
x
stop
y product z
manufacture
customer
manufacturer
customer
manufacturer
(a) Correct business process
(b) Incorrect business process</p>
      <p>Consider a business process formed by a customer and a manufacturer (Fig. 1a).
The customer orders a product x from the manufacturer by telling the
manufacturer the product’s id (order). The manufacturer assembles the product
associated with the id and returns the product to the customer (manufacture).
Let us now assume that due to a design error in the manufacturer’s internal
workflow, the id y obtained from the customer is lost and replaced by the id of an
arbitrary product z (Fig. 1b). Then, the customer will get a product different from
the one he expects. In that case, no further action (receive) can be performed
because the condition x = y is not satisfied and we reach a deadlock. We call this
a conditional deadlock, because it occurs only if the compared data values are
not equal. Note that in a more complex scenario, a choice dependent on data
may not always lead to a deadlock instantly but later on in the process. In that
case, the deadlock condition has to be propagated backwards. This aspect will
not be covered in this paper.</p>
      <p>We introduce an approach to detect conditional deadlocks and to derive the
dependency between values that must be used in order to avoid the deadlock. In
Sect. 2, we illustrate by simple examples, how to identify deadlocks by means of
a symbolic reachability graph. Section 3 shows by a more sophisticated example,
how to derive the precise conditions under which an conditional deadlock can be
avoided. It is not always possible to derive these conditions precisely. Section 4
shows an example that can not be corrected with our approach due to imprecise
results. In Sect.5, we conclude our work.
2</p>
    </sec>
    <sec id="sec-2">
      <title>Basic Idea</title>
      <p>In this section, we show how to detect a deadlock by means of the symbolic
reachability graph (SRG) of the Petri net. In the following examples, we assume
that every place has the type integer except for some places that carry tokens
(denoted as black dots) that do not have a value. A marking m of a Petri net N
is considered a deadlock, if no transition is enabled and m is not contained in a
set Ω of final markings of N .</p>
      <p>In each of the following exam- p0 p0
ples, we assume that the net is in
a final marking exactly when the t0 t0 [x 0]
npelatcNe1pΩin Fisigm.a2ark.eWd.e Ccaonnseiadseilry tsheee p1 xx [ p0t]0 &lt;x=V0&gt; p1 xx
that N1 is not deadlock free and t1 [x 0] [ p1=V0 ] t1 [x 0]
M = {[p1 = n]|n ∈ Z, n &lt; 0} is x t1 &lt;x=V0&gt; x
the set of deadlocks reachable in pΩ [ pΩ=V0, V0 0 ] pΩ
N1. Obviously, by adding the guard (a) N1 (b) SRG(N1) (c) N10
x ≥ 0 to t0, we can ensure that t1
will always be enabled and N1 will Fig. 2: Net with a conditional deadlock and
eventually reach the final marking its correction
[pΩ] (Fig. 2c).</p>
      <p>In a marking of the symbolic
reachability graph, every value is represented by a term. Without going into
technical details, we show how to construct the symbolic reachability graph of
N1. Starting from initial marking [p0], t1 produces an arbitrary integer on p1
(Fig. 2b). We represent this integer by a unique identifier V0. Thus we get the
marking [p1 = V0]. While formally V0 is a constant, we treat V0 as a variable:
V0 may later be instantiated by any value from Z. Since t1 is enabled only if
V0 is non-negative, we keep the condition in V0 ≥ 0 in the successor marking
[p2 = V0, V0 ≥ 0] of [p1 = V0] (we obtain the condition by combining the firing
mode of t1 and the guard of t1). We consider an instance of a marking of the
symbolic reachability graph valid, if every condition denoted in the marking
evaluates to true. Obviously, a marking of N1 is reachable exactly if it is a valid
instance of a marking of the symbolic reachability graph.</p>
      <p>With the symbolic reachability graph, we can identify under which condition
a marking instantiates to a deadlock. Here, [p1 = V0] is a conditional deadlock
for ¬V0 ≥ 0 since each instance of [p1 = V0] has no successor for this condition.
We now enforce that the condition V0 ≥ 0 holds in [p1 = V0] by adding the guard
x ≥ 0 to the predecessor-transition t0 of [p1 = V0]. We obtain a corrected version
N10 of N1, which is deadlock free.</p>
      <p>t0
x
x
x
p0
p1
pΩ
(a) N2
x
x
x</p>
      <p>t2
[x&lt;0]
t1 t3
[x&gt;0]
t0 &lt;x=V0&gt;
[ p1=V0 ]
[ p0 ]
t2 &lt;x=V1&gt;
[ p1=V1 ]
t1 &lt;x=V0&gt; t3 &lt;x=V0&gt; t1 &lt;x=V1&gt; t3 &lt;x=V1&gt;
[ pΩ=V0, V0&lt;0 ] [ pΩ=V0, V0&gt;0 ] [ pΩ=V1, V1&lt;0 ] [ pΩ=V1, V1&gt;0 ]</p>
      <p>(b) SRG(N2)</p>
      <p>Fig. 3a shows a net N2 which is not deadlock free and which has a branching
symbolic reachability graph. Note that the values produced by t0 and t2 obtain
different identifiers (although both branches behave symmetrically). [p1 = V0]
and [p1 = V1] are conditional deadlocks of N2. [p1 = V0] is a deadlock for
¬((V0 &lt; 0) ∨ (V0 &gt; 0)). Any successor of an instance of [p1 = V0] belongs either
to the branch with condition V0 &lt; 0 or the branch with condition V0 &gt; 0. We
enforce the condition (V0 &lt; 0) ∨ (V0 &gt; 0) by adding the guard (x &lt; 0) ∨ (x &gt; 0)
to t0 (which is effectively equivalent to x 6= 0). By repeating this procedure for
[p1 = V1], we get the same guard for t2 and obtain a deadlock free net.
3</p>
    </sec>
    <sec id="sec-3">
      <title>Derivation of a deadlock-preventing guard</title>
      <p>In the previous section, we have shown that by adding an appropriate guard, we
can prevent the reachability of deadlocks. Adding a guard or replacing a guard by
a more restrictive one makes the net less permissive, that is the set of reachable
markings gets smaller. Naturally, we want to prevent all deadlocks from being
reachable. On the other hand, we do not want to prevent the reachability of
more markings than necessary. This section addresses the issue of deriving a
least restrictive guard. How to derive a guard (like x &gt; 0) from a condition (like
V0 &gt; 0) is not obvious if more than one variable is involved and functions are
used in the arc inscriptions.</p>
      <p>Without loss of generality, we assume that the symbolic reachability graph
is a tree (if not, we can unfold it). Note that the symbolic reachability graph
usually has an acyclic structure since names of value identifiers never repeat. In
the tree, we always modify the guard of the transition that directly precedes the
deadlock. It should be mentioned here, that due to restrictions inherent to the
modelled the business process (e. g. the dependency on of external events which
can not be influenced), it might not be possible to modify that transition. In that
case, we choose the first modifiable predecessor transition in the tree. As guard
derivation is more involved in that case, it will not be shown here. Consider the
net N3 in Fig. 4a, which reaches a deadlock if the integer produced by t1 on p3
is greater than the integer produced by t0 on p1. An ad-hoc way to fix N3 is to
add the guard z ≥ y to t1. Then, N3 eventually reaches the final marking [pΩ].
However, the guard z ≥ y − 1 would also ensure that N3 reaches [pΩ] but is less
restrictive than x ≥ y, since it evaluates to true for more assignments of x and y.
The guard y = 6 ∨ z ≥ y − 1 is even less restrictive than z ≥ y − 1.</p>
      <p>We derive this guard from
the symbolic reachability graph
in Fig. 4b. m0 is a deadlock for
condition ¬(V0 ≤ V1) since ev- p0
ery valid instance of m00
satisrfieeaschVa0bi≤lityV1o.f Wme0 upnrdeverenctonthdei- p1 xt0 p2[xx≠+51]
tion ¬(V0 ≤ V1) by adding a y
guard to t1. It is sufficient that t1 [ p0 ]
the guard forbids the violation of x z t0 &lt;x=V0&gt;
V0 ≤ V1 only for valid instances p3 [ p1=V0, p2=V0+1, V0≠5 ] (=m)
of m and m0. So we can assume z t1 &lt;y=V0+1,z=V1&gt;
that for a step m →a m0 (where t2 [x z] [ p1=V0, p3=V1, V0≠5 ] (=m’)
iant=egte1rhsy V=0 Va0n+d V1,1zg=iveVn1i) with pΩ [ pΩ, V0≠5t,2V&lt;0z=VV11]&gt; (=m’’)
(1) the condition V0 6= 5 already (a) N3 (b) SRG(N3)
holds (precondition in m) Fig. 4: A net that is less obvious to correct
(2) y and z are bound to the
valuations of V0 + 1 and V1 (firing
mode of t1).</p>
      <p>This motivates the definition of the expression</p>
      <p>∀V0, V1 ∈ Z : V0 6= 5 ∧ y = V0 + 1 ∧ z = V1 =⇒ V0 ≤ V1
We call this expression least restrictive V0 ≤ V1-enforcing (for step m →a m0).
Note that the more preconditions an expression has, the less restrictive it is. V0
and V1 are all-quantified because the condition V0 ≤ V1 shall be enforced for any
valid instance of m0. It is easy to see that this expression is indeed equivalent
to y = 6 ∨ z ≥ y − 1. Since V0, V1 are uniquely determined by y and z, we can
replace V0 by y − 1 and V1 by z, thus eliminating V0, V1 from the expression.</p>
      <p>We go back to the business process introduced in Fig. 1a. The reader may
believe that there is a deadlock m0 = [exp. prod. = V0, product = V1] for
condition ¬(V0 = V1) which is reachable from m = [exp. prod. = V0, id(V0)]
via transition manufacture. This leads to the expression ∀V0, V1 ∈ Z : y =
id(V0) ∧ z = V1 =⇒ V0 = V1, which is equivalent to z = id−1(y). Thus we have
reconstructed the dependency between products and their id’s and may correct
the business process by replacing z by id−1(y).</p>
      <p>
        In general, several successive deadlock elimination steps are necessary in
order to obtain a deadlock free net, as every step may introduce new deadlocks.
Our approach is similar to Dijkstra’s method to derive the weakest precondition
for which a given program terminates in a specified state [
        <xref ref-type="bibr" rid="ref2">2</xref>
        ]. However, our
approach allows to derive a modification even for an intermediate step because a
precondition and a postcondition are already given. Therefore, we may perform
modifications in a local manner and do not have to start at the final markings.
Conceptually, the approach is applicable even if no final marking is specified at
all.
      </p>
      <p>Note that modifying a transition may have non-local side-effects if the
transition appears more than once in the tree. In that case, more markings are rendered
unreachable than intended, leading to a suboptimal solution. As the next section
shows that even without non-local side-effects, it is not always possible to get an
optimal solution.
4</p>
    </sec>
    <sec id="sec-4">
      <title>Uncorrectable net</title>
      <p>Some nets can not be corrected using the expression derived in the last section.
Consider the net N4 in Fig. 5a. There is no unique way to avoid the deadlocks of
p0
t0
p1
t1
p2
[x&lt;y]
t2
pΩ
py</p>
      <p>px
x
y
y
x
(a) N4
[ p0 ]</p>
      <p>t0 &lt;x=V0&gt;
[ p1, px=V0 ]</p>
      <p>t1 &lt;y=V1&gt;
[ p2, px=V0, py=V1 ]</p>
      <p>t2 &lt;x=V0, y=V1&gt;
[ pΩ, V0&lt;V1 ]
(b) SRG(N4)
N4. For example, we get a deadlock free net N40 (Fig. 5c) by adding the guard
x &lt; 5 to t0 and y ≥ 5 to t1. However, instead of 5, we could have chosen any
other integer. The symbolic reachability graph does not give us a hint on how to
derive the general structure of the two guards. Here, the expression enforcing
V0 &lt; V1 for m t1hy=V1i m0 (with m = [p2 = V0, p1], m0 = [p2 = V0, p3 = V1]) gives
→</p>
      <p>∀V0, V1 ∈ Z : y = V1 =⇒ V0 &lt; V1
which evaluates to false for every y ∈ Z. The expression is too restrictive due to
a lack of information. The condition V0 ≤ V1 that shall be enforced depends on
both the values of V0 and V1, but t1 has no access to the place px on which V1
is stored. For the slightly different net N400 (Fig. 5d) in which t1 has access to
both values, an appropriate guard for t1 can be derived: The expression enforcing
V0 &lt; V1 gives ∀V0, V1 ∈ Z : x = V0 ∧ y = V1 =⇒ V0 &lt; V1, which is equivalent
to x &lt; y.</p>
      <p>
        A related phenomenon is known from controller synthesis. A controller forbids
the supervised system to perform some actions in certain situations. The guards
we add to a transition have an impact on the net comparable to a controller.
If certain sets of states are indistinguishable for the controller, then there is
no unique maximal permissive controller [
        <xref ref-type="bibr" rid="ref6">6</xref>
        ]. From the point of view of t1, all
markings that differ only on place px are indistinguishable.
5
      </p>
    </sec>
    <sec id="sec-5">
      <title>Conclusion and Future work</title>
      <p>The detection and correction of errors in a business process is a tedious task.
Petri nets provide of formal foundation to apply formal verification on business
processes. We have shown how to identify and avoid deadlocks of a High-Level
Petri net by means of a symbolic reachability graph. As a byproduct, our approach
allows to formulate the dependencies between data values that must hold in order
to avoid a deadlock.</p>
      <p>Our goal is to apply our approach in a distributed setting. Therefore, several
problems have to be considered. Since one part of a business process usually
does not have complete information about the state of the other parts, problems
caused by a lack of information as described in Sect. 4 are more likely to occur. It
is also less likely that a deadlock can be fixed locally. Especially in the presence
of cycles, non-local side-effects occur inevitably.</p>
      <p>
        In contrast to [
        <xref ref-type="bibr" rid="ref8">8</xref>
        ], which proposes a correction algorithm for services (but
ignores the data issue), we can not add elements to the structure of the net.
Having net N4 from Fig. 5a in mind, this imposes a strong restriction on the
applicability of our approach. We believe that our approach can still provide
valuable hints for a business process designer. The designer may first design
the business process model with the help of algorithms which do not take data
into account but are more precise on the structure. After the general design of
the business can be considered correct, our approach can be used to find small
errors that occur only for very special combinations of values. In that case, the
modification proposed by our approach might be precise enough to provide a
reasonable correction. We also believe that our approach will produce useful
results if the service that is modified has a very canonical structure (e. g., acyclic
or even tree-like structure). We hope to gain valuable insights regarding the
synthesis of a service that can communicate deadlock-freely with a given service.
      </p>
    </sec>
  </body>
  <back>
    <ref-list>
      <ref id="ref1">
        <mixed-citation>
          1.
          <string-name>
            <surname>Awad</surname>
            ,
            <given-names>A.</given-names>
          </string-name>
          ,
          <string-name>
            <surname>Decker</surname>
            ,
            <given-names>G.</given-names>
          </string-name>
          ,
          <string-name>
            <surname>Lohmann</surname>
          </string-name>
          , N.:
          <article-title>Diagnosing and repairing data anomalies in process models</article-title>
          . In: Rinderle-Ma,
          <string-name>
            <given-names>S.</given-names>
            ,
            <surname>Sadiq</surname>
          </string-name>
          ,
          <string-name>
            <given-names>S.</given-names>
            ,
            <surname>Leymann</surname>
          </string-name>
          ,
          <string-name>
            <surname>F</surname>
          </string-name>
          . (eds.) Business Process Management Workshops,
          <source>BPM 2009. Lecture Notes in Business Information Processing</source>
          , vol.
          <volume>43</volume>
          , pp.
          <fpage>5</fpage>
          -
          <lpage>16</lpage>
          . Springer-Verlag (
          <year>Mar 2010</year>
          )
        </mixed-citation>
      </ref>
      <ref id="ref2">
        <mixed-citation>
          2.
          <string-name>
            <surname>Dijkstra</surname>
            ,
            <given-names>E.W.:</given-names>
          </string-name>
          <article-title>A Discipline of Programming</article-title>
          . Prentice Hall, Inc. (
          <year>October 1976</year>
          )
        </mixed-citation>
      </ref>
      <ref id="ref3">
        <mixed-citation>
          3.
          <string-name>
            <surname>Fan</surname>
            ,
            <given-names>S.</given-names>
          </string-name>
          ,
          <string-name>
            <surname>Dou</surname>
            ,
            <given-names>W.</given-names>
          </string-name>
          ,
          <string-name>
            <surname>Chen</surname>
          </string-name>
          , J.:
          <article-title>Dual Workflow Nets: Mixed Control/Data-Flow Representation for Workflow Modeling and Verification</article-title>
          . pp.
          <fpage>433</fpage>
          -
          <lpage>444</lpage>
          (
          <year>2007</year>
          )
        </mixed-citation>
      </ref>
      <ref id="ref4">
        <mixed-citation>
          4.
          <string-name>
            <surname>Ferrara</surname>
            ,
            <given-names>A.</given-names>
          </string-name>
          :
          <article-title>Web services: a process algebra approach</article-title>
          .
          <source>In: Proceedings of the 2nd international conference on Service oriented computing</source>
          . pp.
          <fpage>242</fpage>
          -
          <lpage>251</lpage>
          . ICSOC '04,
          <string-name>
            <surname>ACM</surname>
          </string-name>
          , New York, NY, USA (
          <year>2004</year>
          )
        </mixed-citation>
      </ref>
      <ref id="ref5">
        <mixed-citation>
          5.
          <string-name>
            <surname>Jensen</surname>
            ,
            <given-names>K.</given-names>
          </string-name>
          :
          <source>Coloured Petri Nets: Basic Concepts</source>
          ,
          <source>Analysis Methods and Practical Use (Volume 1)</source>
          ,
          <source>EATCS Series</source>
          , vol.
          <volume>1</volume>
          . Springer Verlag (
          <year>April 1992</year>
          )
        </mixed-citation>
      </ref>
      <ref id="ref6">
        <mixed-citation>
          6.
          <string-name>
            <surname>Kalyon</surname>
            ,
            <given-names>G.</given-names>
          </string-name>
          ,
          <string-name>
            <surname>Le Gall</surname>
            ,
            <given-names>T.</given-names>
          </string-name>
          ,
          <string-name>
            <surname>Marchand</surname>
            ,
            <given-names>H.</given-names>
          </string-name>
          ,
          <string-name>
            <surname>Massart</surname>
            ,
            <given-names>T.</given-names>
          </string-name>
          :
          <article-title>Control of Infinite Symbolic Transition Systems under Partial Observation</article-title>
          .
          <source>In: European Control Conference. Budapest Hungary (Aug</source>
          <year>2009</year>
          )
        </mixed-citation>
      </ref>
      <ref id="ref7">
        <mixed-citation>
          7.
          <string-name>
            <surname>Lohmann</surname>
          </string-name>
          , N.:
          <article-title>A feature-complete Petri net semantics for WS-BPEL 2.0 and its compiler BPEL2oWFN</article-title>
          .
          <source>Informatik-Berichte</source>
          <volume>212</volume>
          ,
          <string-name>
            <surname>Humboldt-Universität</surname>
          </string-name>
          zu Berlin (
          <year>Aug 2007</year>
          )
        </mixed-citation>
      </ref>
      <ref id="ref8">
        <mixed-citation>
          8.
          <string-name>
            <surname>Lohmann</surname>
          </string-name>
          , N.:
          <article-title>Correcting deadlocking service choreographies using a simulationbased graph edit distance</article-title>
          .
          <source>In: BPM 2008. LNCS</source>
          , Springer-Verlag (
          <year>Sep 2008</year>
          )
        </mixed-citation>
      </ref>
      <ref id="ref9">
        <mixed-citation>
          9.
          <string-name>
            <surname>Lohmann</surname>
            ,
            <given-names>N.</given-names>
          </string-name>
          ,
          <string-name>
            <surname>Verbeek</surname>
            ,
            <given-names>E.</given-names>
          </string-name>
          ,
          <string-name>
            <surname>Dijkman</surname>
          </string-name>
          , R.:
          <article-title>Petri net transformations for business processes - A survey</article-title>
          . In: Jensen,
          <string-name>
            <given-names>K.</given-names>
            ,
            <surname>van der Aalst</surname>
          </string-name>
          , W. (eds.)
          <source>Transactions on Petri Nets and Other Models of Concurrency II, Lecture Notes in Computer Science</source>
          , vol.
          <volume>5460</volume>
          , pp.
          <fpage>46</fpage>
          -
          <lpage>63</lpage>
          . Springer Berlin / Heidelberg (
          <year>2009</year>
          )
        </mixed-citation>
      </ref>
      <ref id="ref10">
        <mixed-citation>
          10.
          <string-name>
            <surname>Ratzer</surname>
            ,
            <given-names>A.V.</given-names>
          </string-name>
          ,
          <string-name>
            <surname>Wells</surname>
            ,
            <given-names>L.</given-names>
          </string-name>
          ,
          <string-name>
            <surname>Lassen</surname>
            ,
            <given-names>H.M.</given-names>
          </string-name>
          ,
          <string-name>
            <surname>Laursen</surname>
            ,
            <given-names>M.</given-names>
          </string-name>
          ,
          <string-name>
            <surname>Qvortrup</surname>
            ,
            <given-names>J.F.</given-names>
          </string-name>
          ,
          <string-name>
            <surname>Stissing</surname>
            ,
            <given-names>M.S.</given-names>
          </string-name>
          ,
          <string-name>
            <surname>Westergaard</surname>
            ,
            <given-names>M.</given-names>
          </string-name>
          ,
          <string-name>
            <surname>Christensen</surname>
            ,
            <given-names>S.</given-names>
          </string-name>
          ,
          <string-name>
            <surname>Jensen</surname>
            ,
            <given-names>K.</given-names>
          </string-name>
          :
          <article-title>CPN Tools for editing, simulating, and analysing coloured petri nets</article-title>
          . In: van der Aalst,
          <string-name>
            <given-names>W.M.P.</given-names>
            ,
            <surname>Best</surname>
          </string-name>
          , E. (eds.)
          <source>ICATPN. Lecture Notes in Computer Science</source>
          , vol.
          <volume>2679</volume>
          , pp.
          <fpage>450</fpage>
          -
          <lpage>462</lpage>
          . Springer (
          <year>2003</year>
          )
        </mixed-citation>
      </ref>
      <ref id="ref11">
        <mixed-citation>
          11.
          <string-name>
            <surname>Reisig</surname>
          </string-name>
          , W.:
          <article-title>On the Expressive Power of Petri Net Schemata</article-title>
          .
          <source>In: ICATPN</source>
          <year>2005</year>
          ,
          <article-title>Miami</article-title>
          , USA.
          <source>Proceedings. Lecture Notes in Computer Science</source>
          , vol.
          <volume>3536</volume>
          , pp.
          <fpage>349</fpage>
          -
          <lpage>364</lpage>
          . Springer Verlag (May
          <year>2005</year>
          )
        </mixed-citation>
      </ref>
      <ref id="ref12">
        <mixed-citation>
          12.
          <string-name>
            <surname>Sun</surname>
            ,
            <given-names>S.X.</given-names>
          </string-name>
          ,
          <string-name>
            <surname>Zhao</surname>
            ,
            <given-names>J.L.</given-names>
          </string-name>
          ,
          <string-name>
            <surname>Nunamaker</surname>
            ,
            <given-names>J.F.</given-names>
          </string-name>
          ,
          <string-name>
            <surname>Sheng</surname>
            ,
            <given-names>O.R.L.</given-names>
          </string-name>
          :
          <article-title>Formulating the data-flow perspective for business process management</article-title>
          .
          <source>Information Systems Research</source>
          <volume>17</volume>
          (
          <issue>4</issue>
          ),
          <fpage>374</fpage>
          -
          <lpage>391</lpage>
          (
          <year>2006</year>
          )
        </mixed-citation>
      </ref>
      <ref id="ref13">
        <mixed-citation>
          13.
          <string-name>
            <surname>Trčka</surname>
            ,
            <given-names>N.</given-names>
          </string-name>
          ,
          <string-name>
            <surname>Sidorova</surname>
            ,
            <given-names>N.</given-names>
          </string-name>
          :
          <article-title>Data-flow anti-patterns: Discovering data-flow errors in workflows</article-title>
          .
          <source>In: CAiSE 2009. LNCS 5565</source>
          . p.
          <fpage>425</fpage>
          . Springer (
          <year>2009</year>
          )
        </mixed-citation>
      </ref>
    </ref-list>
  </back>
</article>