<!DOCTYPE article PUBLIC "-//NLM//DTD JATS (Z39.96) Journal Archiving and Interchange DTD v1.0 20120330//EN" "JATS-archivearticle1.dtd">
<article xmlns:xlink="http://www.w3.org/1999/xlink">
  <front>
    <journal-meta />
    <article-meta>
      <title-group>
        <article-title>Bounded Model Checking for Parametric Timed ⋆ Automata</article-title>
      </title-group>
      <contrib-group>
        <contrib contrib-type="author">
          <string-name>Michal Knapik</string-name>
          <email>Michal.Knapik@ipipan.waw.pl</email>
          <xref ref-type="aff" rid="aff0">0</xref>
        </contrib>
        <contrib contrib-type="author">
          <string-name>Wojciech Penczek</string-name>
          <email>penczek@ipipan.waw.pl</email>
          <xref ref-type="aff" rid="aff0">0</xref>
          <xref ref-type="aff" rid="aff1">1</xref>
        </contrib>
        <aff id="aff0">
          <label>0</label>
          <institution>Institute of Computer Science</institution>
          ,
          <addr-line>PAS, J.K. Ordona 21, 01-237 Warszawa</addr-line>
          ,
          <country country="PL">Poland</country>
        </aff>
        <aff id="aff1">
          <label>1</label>
          <institution>Institute of Informatics, Podlasie Academy</institution>
          ,
          <addr-line>Sienkiewicza 51, 08-110 Siedlce</addr-line>
          ,
          <country country="PL">Poland</country>
        </aff>
      </contrib-group>
      <fpage>419</fpage>
      <lpage>435</lpage>
      <abstract>
        <p>The paper shows how bounded model checking can be applied to parameter synthesis for parametric timed automata with continuous time. While it is known that the general problem is undecidable even for reachability, we show how to synthesize a part of the set of all the parameter valuations under which the given property holds in a model. The results form a complete theory which can be easily applied to parametric verification of a wide range of temporal formulae - we present such an implementation for the existential part of CTL−X.</p>
      </abstract>
    </article-meta>
  </front>
  <body>
    <sec id="sec-1">
      <title>Introduction and related work</title>
      <p>
        The growing abundance of complex systems in real world, and their presence in
critical areas fuels the research in formal specification and analysis. One of the
established methods in systems verification is model checking, where the system
is abstracted into the algebraic model (e.g. various versions of Kripke structures,
Petri nets, timed automata), and then processed with respect to the given
property (usually a formula of modal or temporal logic). Classical methods have their
limits however – the model is supposed to be a complete abstraction of system
behaviour, with all the timing constraints explicitely specified. This situation
has several drawbacks, e.g. the need to perform a batch of tests to confirm the
proper system design (or find errors) is often impossible to fullfill due to the
high complexity of the problem. Introducing parameters into models changes
the task of property verification to task of parameter synthesis, meaning that
parametric model checking tool produces the set of parameter valuations under
which the given property holds instead of simple holds/does not hold answer.
Unfortunately, the problem of parameter synthesis is shown to be undecidable
for some of widely used parametric models, e.g. parametric timed automata [
        <xref ref-type="bibr" rid="ref3 ref8">3,
8</xref>
        ] and bounded parametric time Petri nets [
        <xref ref-type="bibr" rid="ref15">15</xref>
        ].
      </p>
      <p>
        Many of model checking tools acquired new capabilities of parametric
verification, e.g. UPPAAL-PMC [
        <xref ref-type="bibr" rid="ref11">11</xref>
        ] – the parametric extension of UPPAAL, LPMC
[
        <xref ref-type="bibr" rid="ref14">14</xref>
        ] – extending PMC. Some of the tools were built from scratch with parametric
model checking in mind, e.g. TREX [
        <xref ref-type="bibr" rid="ref1">1</xref>
        ] and MOBY/DC [
        <xref ref-type="bibr" rid="ref7">7</xref>
        ]. Parametric analysis
is also possible with HyTech [
        <xref ref-type="bibr" rid="ref10">10</xref>
        ] by means of hybrid automata. However, due
to undecidability issues, algorithms implemented in these tools need not to stop
and are very time and resource consuming. Another, very interesting approach is
given in a recently developed IMITATOR tool [
        <xref ref-type="bibr" rid="ref4">4</xref>
        ] – having both the parametric
timed automaton and the initial parameter valuation, IMITATOR synthesizes a
set of parameter constraints. Substituting the parameters with a valuation
satisfying these constraints is guaranteed to produce the timed automaton which is
time-abstract equivalent to the one obtained from substituting the parameters
with the initial valuation.
      </p>
      <p>
        In this paper we present a new approach to parametric model checking,
based on the observation that while we are not able to synthesize the full set of
parameter constraints in general, there is no fundamental rule which forbids us
from obtaining a part of this set. In Section 2 we introduce the parametric region
graph – an extension of region graph used in theory of timed automata [
        <xref ref-type="bibr" rid="ref2">2</xref>
        ] and
show (in Section 3) how the computation tree of a model can be unwinded up to
some finite depth in order to apply bounded model checking (BMC) techniques
[
        <xref ref-type="bibr" rid="ref5">5</xref>
        ]. To the best knowledge of the authors, this is the first application of BMC
to parametric timed automata and seems to be a quite promising direction of
research – firstly due to the unique BMC advantage which allows for verification
of properties in limited part of the model, secondly due to the fact that it is quite
easy to present BMC-based model checking algorithms for existential parts of
many modal and temporal logics. In fact we describe how Parametric BMC can
be implemented for the existential subset of CTL−X logic in Section 3, including
the analysis of a simplified parametric model of the 4-phase handshake protocol.
2
      </p>
    </sec>
    <sec id="sec-2">
      <title>Theory of Parametric Timed Automata</title>
      <p>
        In this paper we use two kinds of variables, namely parameters P = {p1, . . . , pm}
and clocks X = {x0, . . . , xn}. An expression of the form Pim=1 ti · pi + t0, where
ti ∈ Z is called a linear expression. A simple guard is an expression of the form
xi − xj ≺ e, where i 6= j, ≺∈ {≤, &lt;} and e is a linear expression. A conjunction
of simple guards is called a guard and the set of all guards is denoted by G. We
valuate the clocks in nonnegative reals, and parameters in naturals (including
0) that is υ : P → N is a parameter valuation and ω : X → R≥0 is a clock
valuation (both υ and ω can be thought of as points in, respectively, Nm and
R≥0n). Additionally, following [
        <xref ref-type="bibr" rid="ref11">11</xref>
        ] we assume that ω(x0) = 0 – the ”false clock”
x0 is fixed on 0 for convenience only, for uniform presentation of guards. By
e[υ] we denote the value obtained by substituting the parameters in a linear
expression e according to parameter valuation υ. We denote ω |=υ xi − xj ≺ e
iff ω(xi) − ω(xj ) ≺ e[v] holds, and naturally extend this notion to guards. We
also need a notion of reset that is a set of expressions of the form xi := bi where
bi ∈ N, and 0 &lt; i ≤ n. The set of all resets is denoted by R, and the action
of resetting a clock valuation ω by reset r ∈ R is defined as following: ω[r] is
a clock valuation such that ω[r](xi) = bi if xi := bi ∈ r, and ω[r](xi) = ω(xi)
      </p>
      <sec id="sec-2-1">
        <title>Petri Nets &amp; Concurrency { 421</title>
        <p>otherwise. If δ ∈ R and ω is a clock valuation, then ω + δ is a clock valuation
such that (ω + δ)(xi) = ω(xi) + δ for all 0 &lt; i ≤ n, and ω(x0) = 0. An initial
clock valuation ω0 is the valuation satisfying ω(xi) = 0 for all xi ∈ X.</p>
        <p>
          We also adopt a convenient notation from [
          <xref ref-type="bibr" rid="ref11">11</xref>
          ], where the ≤ symbol is treated
as true and the &lt; symbol is treated as f alse. The propositional formulae built
from symbols ≤ and &lt; are evaluated in a standard way. As to give an example,
≤⇒&lt; evaluates to &lt;, &lt;⇒≤ evaluates to ≤, and ¬(≤ ∨ &lt;) evaluates to &lt;.
2.1
        </p>
        <sec id="sec-2-1-1">
          <title>Parametric Timed Automata</title>
          <p>
            Let us recall some notions from the theory of parametric timed automata.
Nonparametric timed automata [
            <xref ref-type="bibr" rid="ref2">2</xref>
            ] are state-transition graphs augmented with a
finite number of clocks, and clock constraints guarding the transitions between
states. Their parametric version [
            <xref ref-type="bibr" rid="ref3">3</xref>
            ] allows for using parameters (other than
clocks) in guard expressions – which may be perceived as creating the general
template for system behaviour under more abstract timed constraints.
Definition 1. A tuple A = hQ, q0, A, X, P, →, Ii where:
– Q is a set of locations,
– q0 ∈ Q is the initial location,
– A is a set of actions,
– X and P are, respectively, sets of clocks and parameters,
– I : Q → G is an invariant function,
– →⊆ Q × A × G × R × Q is a transition relation.
is called a parametric timed automaton (PTA). All the above sets are finite. We
abbreviate (q, a, g, r, q′ ) as q a→,g,r q′ .
          </p>
          <p>The semantics of PTA is presented below, in form of a labeled transition
system.</p>
          <p>Definition 2 (Concrete semantics). Let A = hQ, q0, A, X, P, →, Ii be a
parametric timed automaton and υ be a parameter valuation. The labeled transition
d
system of A under υ is defined as a tuple [A]υ = hS, s0, →i where:
– S = {(q, ω) | q ∈ Q, and ω is a clock valuation such that ω |=υ I(q)},
– s0 = (q0, ω0) (we assume that ω0 |=υ I(q0)),
– let (q, ω), (q′ , ω′ ) ∈ S. The transition relation →d is defined as follows:
• if d ∈ R≥0, then (q, ω) →d (q′ , ω′ ) iff q = q′ and ω′ = ω + d,
• if d ∈ A, then (q, ω) →d (q′ , ω′ ) iff q a→,g,r q′ , and ω |=υ g, and ω′ = ω[r].
The elements of S are called the concrete states of Aυ.</p>
          <p>
            The automaton obtained by substituting parameters in the guards and the
invariants of A by appropriate values of the parameter valuation υ is denoted
by Aυ. The concrete semantics of Aυ is defined as [Aυ] = [A]υ. Notice that Aυ
is a timed automaton and [Aυ] – its concrete semantics [
            <xref ref-type="bibr" rid="ref2">2</xref>
            ].
          </p>
          <p>
            Our definition of parametric timed automata slightly differs from the one
presented in [
            <xref ref-type="bibr" rid="ref11">11</xref>
            ], namely, we do not allow nonnegative reals as parameter values.
As it was shown in [
            <xref ref-type="bibr" rid="ref3">3</xref>
            ], the choice of the parameter valuation codomain does not
change the fact that the emptiness problem is undecidable. We explain the origin
of this restriction in the following subsection.
2.2
          </p>
        </sec>
        <sec id="sec-2-1-2">
          <title>Parametric Region Graph</title>
          <p>
            In non-parametric timed automata theory, the region graph [
            <xref ref-type="bibr" rid="ref2">2</xref>
            ] is used as a part
of a convenient method of presenting the concrete state space in a uniform,
finite way. The finiteness of the resulting structure is a result of presence of both
the bounded and unbounded regions. Intuitively, the bounded regions are convex
bounded sets in the space of clock valuations, while the unbounded regions are
convex and unbounded. The latter ones are defined using the maximal values of
clock constraints – this is not possible in the general case of parametric timed
automata (see however the optimization techniques in [
            <xref ref-type="bibr" rid="ref11">11</xref>
            ]), therefore in this
paper we consider only the bounded regions. We divide the space of all the clock
valuations into the set of regions using the following equivalence relation.
Definition 3. Let ω, ω′ be valuations of clocks X = {x0, . . . , xn}. Then, ω ≈ ω′
iff the following conditions hold:
– ⌊ ω(xi)⌋ = ⌊ ω′ (xi)⌋ for all xi ∈ X,
– and f rac(ω(xi)) &lt; f rac(ω(xj)) ⇐⇒ f rac(ω′ (xi)) &lt; f rac(ω′ (xj)) for all
i 6= j, 1 ≤ i, j ≤ n,
– and f rac(ω(xi)) = 0 ⇐⇒ f rac(ω′ (xi)) = 0 for all xi ∈ X,
where f rac(ω(xi)) denotes the fractional part of ω(xi). The equivalence classes
of ≈ are called (detailed) regions.
          </p>
          <p>To our aims it is convenient to describe regions as sets of valuations satisfying
certain guard expressions.</p>
          <p>Lemma 1. Let X = {x0, . . . , xn} be a set of clocks, and Z – a region of
valuations. There exists a guard gZ = Vi,j∈{0,...,n},i6=j xi − xj ≺ij bij, such that
≺ij∈ {≤, &lt;} and bij ∈ Z satisfying:</p>
          <p>Z = {ω | ω |= gZ }.</p>
          <p>Proof. We need to specify the values of bij together with the accompanying
relation ≺ij. Let Z = [ω]≈ (the following considerations are valid for any choice
of ω from Z).</p>
          <p>– If f rac(ω(xi)) = 0, f rac(ω(xj)) = 0, let ≺ij=≤ and bij = ⌊ ω(xi)⌋ − ⌊ ω(xj)⌋ ,
– if f rac(ω(xi)) 6= 0, f rac(ω(xj)) = 0, let ≺ij=&lt; and bij = ⌈ ω(xi)⌉ − ⌊ ω(xj)⌋ ,
– if f rac(ω(xi)) = 0, f rac(ω(xj)) 6= 0, let ≺ij=&lt; and bij = ⌊ ω(xi)⌋ − ⌊ ω(xj)⌋ ,
– for f rac(ω(xi)) 6= 0, f rac(ω(xj)) 6= 0 :
• if f rac(ω(xi)) = f rac(ω(xj)), let ≺ij=≤, bij = ⌊ ω(xi)⌋ − ⌊ ω(xj)⌋ ,</p>
        </sec>
      </sec>
      <sec id="sec-2-2">
        <title>Petri Nets &amp; Concurrency { 423</title>
        <p>• if f rac(ω(xi)) &lt; f rac(ω(xj)), put ≺ij=&lt;, bij = ⌊ ω(xi)⌋ − ⌊ ω(xj)⌋ ,
• if f rac(ω(xi)) &gt; f rac(ω(xj)), let ≺ij=&lt;, bij = ⌈ ω(xi)⌉ − ⌊ ω(xj)⌋ .
It is easy to see that if ω ≈ ω′ , then for any guard g we have ω |= g iff ω′ |= g.
Therefore, as gZ was constructed in such a way that ω |= gZ , we have also
ω′ |= gZ for all ω′ ∈ Z. On the other hand, if ω′ |= gZ , then satisfaction of
the guards of form xi − x0 ≺i0 bi0 and x0 − xi ≺0i b0i (recall that x0 is fixed)
guarantees that ⌊ ω′ (xj)⌋ = ⌊ ω(xj)⌋ for all xj ∈ X. Similarly, ω′ (xi) has nonzero
fractional value iff f rac(ω(xi)) 6= 0, as ω′ (xi) ∈ (⌊ ω(xi)⌋ , ⌈ ω(xi)⌉ ), provided
that f rac(ω(xi)) 6= 0. Let us assume that 0 &lt; f rac(ω(xi)), and f rac(ω(xi)) &lt;
f rac(ω(xj)), then from ω(xi) − ω(xj) &lt; ⌊ ω(xi)⌋ − ⌊ ω(xj)⌋ we have ω′ (xi) −
ω′ (xj) &lt; ⌊ ω′ (xi)⌋ − ⌊ ω′ (xj)⌋ . Therefore ω′ (xi) − ⌊ ω′ (xi)⌋ &lt; ω′ (xj) − ⌊ ω′ (xj)⌋ ,
thus f rac(ω(xi)) &lt; f rac(ω(xj)).</p>
        <p>The guard constructed in the proof of the above lemma is called the
characteristic guard of Z. In the above proof we used the fact that if one representative
of an equivalence class satisfies a guard g, then so do all the remaining members.
This is not true if we allow nonnegative reals as parameter values – for
example it is easy to see that only some of representatives of class [(0, 0.3)] satisfy
x1 − x0 &lt; p under parameter valuation υ such that υ(p) = 0.5.</p>
        <p>Definition 4. Let A = hQ, q0, A, X, P, →, Ii be a parametric timed automaton,
X = {x0, . . . , xn} and P = {p1, . . . , pm}. We introduce a relation in the set of
all the pairs (Z, C) where Z is a region, and C ⊆ Nm is a subset of the set of
all the valuations of parameters (treated as natural vectors). Let s = xi − xj ≺ e
be a simple guard, and gZ = Vi,j∈{0,...,n},i6=j xi − xj ≺ij bij the characteristic
guard of region Z. Then we define:</p>
        <p>(Z, C) ;s (Z′ , C′ ) iff Z = Z′ and C′ = C ∩ {υ | bij(≺ij⇒≺)e[v]}.
Let g be a guard and s a simple guard, then:
(Z, C) g;∧s (Z′ , C′ ) iff for some (Z′ , C′ ) we have (Z, C) ;g (Z′ , C′ )
and (Z′ , C′ ) ;s (Z′ , C′ ).</p>
        <p>
          There is a natural intuition behind the above definition – if (Z, C) ;g (Z′ , C′ )
then (Z′ , C′ ) contains all the pairs (ω, υ) ∈ Z × C such that ω |=υ g. Such an
operation is a counterpart for guard addition from [
          <xref ref-type="bibr" rid="ref11">11</xref>
          ], notice however that
we do not need a burden of costly canonicalization. Below we state some basic
properties of ;g relation.
        </p>
        <p>Lemma 2. Let (Z, C) ;g (Z′ , C′ ), where g is a guard. Then, the following
conditions hold:
1. if (ω, υ) ∈ (Z, C) and ω |=υ g, then (ω, υ) ∈ (Z′ , C′ ),
2. if (ω, υ) ∈ (Z′ , C′ ), then ω |=υ g.
Proof. Let us start with the first part of the lemma. Let us assume that ω |=υ g.
By the induction on the complexity of g we prove that υ ∈ C′ .</p>
        <p>The base case is when g = xi − xj ≺ e (g is a simple guard). Let us assume
that gZ contains a simple guard of the form xi − xj ≤ bij where bij ∈ Z. Notice
that in this case the characteristic guard contains also a simple guard of the
form xj − xi ≤ −bij, therefore bij = ω′ (xi) − ω′ (xj) for each ω′ ∈ Z. As ω |=υ g,
then bij = ω′ (xi) − ω′ (xj) ≺ e[υ]. Therefore bij ≺ e[υ], which in this case means
that bij(≺ij⇒≺)e[υ]. Now let us assume that gZ contains a simple guard of the
form xi − xj &lt; bij. In this case, for each ω′ ∈ Z there exists δ ∈ (0, 1) such
that ω′ (xi) − ω′ (xj) = (bij − 1) + δ. Let us notice that e[υ] ∈ Z, therefore from
(bij − 1) + δ = ω′ (xi) − ω′ (xj) ≺ e[υ] we obtain bij ≤ e[υ]. The latter inequality
means that in this case bij(≺ij⇒≺)e[υ] holds.</p>
        <p>For the induction step, notice that if (Z, C) g;′∧s (Z′ , C′ ) (g′ is a guard,
′
and s a simple guard), then there exists (Z′ , C′ ) such that (Z, C) ;g (Z′ , C′ )
and (Z′ , C′ ) ;s (Z′ , C′ ). From the inductive assumption we obtain that as
ω |=υ g′ ∧ s implies ω |=υ g′ , then υ ∈ C′ . Similarly, as (ω, υ) ∈ (Z′ , C′ ) and
ω |=υ s, we have υ ∈ C′ .</p>
        <p>The proof of the second part of the lemma is also by the induction on the
structure of g. Assume that g = xi − xj ≺ e and gZ contains a simple guard of
form xi−xj ≺ij bij. If (Z, C) ;g (Z′ , C′ ), then C′ = C ∩{υ | bij(≺ij⇒≺)e[υ]}. As
ω(xi)−ω(xj) ≺ij bij and bij(≺ij⇒≺)e[υ] then ω(xi)−ω(xj)(≺ij ∧(≺ij⇒≺))e[υ].
Therefore we have ω(xi) − ω(xj) ≺ e[υ], thus ω |=υ g.</p>
        <p>For the induction step, let us notice that if (Z, C) g;′∧s (Z′ , C′ ), then there
′
exists (Z′ , C′ ) such that (Z, C) ;g (Z′ , C′ ) and (Z′ , C′ ) ;s (Z′ , C′ ). If (ω, υ) ∈
(Z′ , C′ ) then by the inductive assumption ω |=υ s holds. As C′ ⊆ C′ ⊆ C, then
υ ∈ C′ and (ω, υ) ∈ (Z′ , C′ ). Therefore, from the inductive assumption we
obtain ω |=υ g′ and, finally, ω |=υ g′ ∧ s.</p>
        <p>From the above lemma we immediately obtain the following corollary.
Corollary 1. Let Z be a region, and C a subset of set of all the parameter
valuations. Then, the following conditions hold:
1. if (Z, C) ;g (Z′ , C′ ), then Z′ × C′ = Z × C ∩ {(ω, υ) | ω |=υ g},
2. if ω ∈ Z, υ ∈ C, and ω |=υ g, then (Z, C) ;g (Z′ , C′ ) for some Z′ , C′ such
that (ω, υ) ∈ Z′ × C′ .</p>
        <p>In order to develop our theory further, we need to define two additional
operations on regions.</p>
        <p>Definition 5. Let Z = [ω]≈ be a region and r ∈ R be a reset. Then, resetting
of Z by r is defined as: Z[r] = [ω[r]]≈.</p>
        <p>Clearly, resetting of a region does not depend on the choice of a
representative.</p>
      </sec>
      <sec id="sec-2-3">
        <title>Petri Nets &amp; Concurrency { 425</title>
        <p>Definition 6. Let Z and Z′ be two different regions. Region Z′ is called a time
successor of Z (denoted by τ (Z)) iff for all ω ∈ Z there exists δ ∈ R such that
ω + δ ∈ Z′ and ω + δ′ ∈ Z ∪ Z′ for all δ′ ≤ δ.</p>
        <p>
          Now, we are in the position to present the notion of a parametric region graph,
being an extension of region graph used in theory of timed automata [
          <xref ref-type="bibr" rid="ref2">2</xref>
          ]. The
main idea is to augment regions with sets of parameter valuations under which
the given concrete state (its equivalence class) is reachable from the initial state,
and to mimick the transitions in the concrete semantics by their counterparts in
parametric region graph.
        </p>
        <p>Definition 7. Let A = hQ, q0, A, X, P, →, Ii be a parametric timed automaton.
d
Define the parametric region graph of A as the tuple P REG(A) = hS, s0, →i
where:
– S = {(q, Z, C) | q ∈ Q, Z is a region, C ⊆ Nm and ∀υ∈C ∃ω∈Z ω |=υ I(q)},
– s0 = (q0, Z0, C0) where Z0 = [ω0]≈ and C0 = {υ | ω0 |=υ I(q0)},
– (q, Z, C) →d (q′ , Z′ , C′ ) is defined as follows:
• if d = τ (time transition), then q = q′ , Z′ = τ (Z), and C′ is such that</p>
        <p>I(q)
(Z′ , C) ; (Z′ , C′ ),
• if d ∈ A (action transition), then there exists a transition q d→,g,r q′ in A
and C′ such that (Z, C) ;g (Z, C′ ) and (Z[r], C′ ) I;(q′ ) (Z′ , C′ ).
Additionally, we call nodes of type (q, Z, ∅) dead, and assume that they have no
outgoing transitions.</p>
        <p>Notice that in the above definition we could replace ∃ with ∀, due to the fact
that for any guard g, fixed parameter valuation υ, and clock valuations ω, ω′
such that ω ≈ ω′ we have ω |=υ g iff ω′ |=υ g.</p>
        <p>Both the concrete semantics of (parametric) timed automaton, and
(parametric) region graph are labelled transition systems. We define finite and infinite
runs in a labelled transition system in a usual way.</p>
        <p>Lemma 3. Let A be a parametric timed automaton, and ρn = s0, s1, . . . sn a
finite run in P REG(A), where si = (qi, Zi, Ci), and Cn 6= ∅. For any (ω, υ) ∈
Zn × Cn there exists a finite run μn = t0, t1, . . . tn in Aυ, such that ti = (qi, ωi),
ωi ∈ Zi for i ∈ {0, . . . , n}, and ωn = ω.</p>
        <p>Proof. The base case of n = 0 is straightforward – as from the definition of
P REG(A) we have ω |=υ I(q0) for any (ω, υ) ∈ Z0 × C0.</p>
        <p>d</p>
        <p>Recall that Cn ⊆ Cn−1. If sn−1 → sn is a time transition (with d = τ ),
then τ (Zn−1) = Zn. Therefore for each ωn ∈ Zn there exist ωn−1 ∈ Zn−1,
and l ∈ R, such that ωn = ωn−1 + l. We conclude the case by noticing that
(ωn−1, υ) ∈ Zn−1 × Cn−1, ωn |=υ I(qn), and using the inductive assumption.</p>
        <p>Now, if sn−1 →d sn is an action transition (d ∈ A), then there exists a
transition qn−1 d→,g,r qn in A, and a subset C′ of Nm, such that (Zn−1, Cn−1) ;
g
(Zn−1, C′ ), and (Zn−1[r], C′ ) I(;qn) (Zn−1[r], Cn). Therefore for each ωn ∈ Zn
we have ωn |=υ I(qn), and there exists ωn−1 ∈ Zn−1 such that ωn = ωn−1[r],
ωn−1 |=υ I(qn−1), and ωn−1 |=υ g (notice that υ ∈ Cn ∩ C′ ∩ Cn−1). We conclude
the case by assuming tn−1 = (qn−1, ωn−1), tn = (qn, ωn) and using the inductive
assumption.</p>
        <p>Notice that the definition of the transition relation in P REG(A) implies
that in ρn we have Ci+1 ⊆ Ci for all 0 ≤ i &lt; n. In particular Cn ⊆ Ci for all
0 ≤ i ≤ n.</p>
        <p>The above lemma does not extend to infinite runs, as shown in the following
example.</p>
        <p>Example 1. Consider the simple parametric timed automaton:</p>
        <p>q
x1 − x0 &lt; p
The following infinite run in P REG(A) does not have a counterpart in Aυ due
to the fact that p is unbounded.</p>
        <p>(q, [(0, 0)], {p | p &gt; 0}) →τ (q, [(0, 0.1)], {p | p ≥ 1}) →τ
(q, [(0, 1)], {p | p &gt; 1}) →τ (q, [(0, 1.1)], {p | p ≥ 2}) →τ . . .</p>
        <p>Consider a transition (q, Z, C) →d (q′ , Z′ , C′ ) in P REG(A). Notice that if
d′
ω ∈ Z, υ ∈ C ∩ C′ , then (q, ω) → (q′ , ω′ ) in [Aυ], where d′ = d if d is an action,
and d′ is some real number if d = τ . From this observation and Lemma 3 we
obtain the following corollary.</p>
        <p>Corollary 2. Let ρ = s0, s1, . . . be an infinite run in P REG(A), such that
si = (qi, Zi, Ci) for some Zi, Ci, and let υ ∈ Ci for all i ≥ 0. Then, there
exists an infinite run μ = t0, t1, . . . in the concrete semantics of Aυ, such that
ti = (qi, ωi), and ωi ∈ Zi.</p>
        <p>The counterpart of Lemma 3 holds without the restriction on finiteness of
runs.</p>
        <p>Lemma 4. Let A be a parametric timed automaton, and μ = t0, t1, . . . tn . . . an
infinite (finite) run in Aυ, where ti = (qi, ωi), and such that if ti →d ti+1 is
a time transition, then [ωi+1] = τ ([ωi]). Then, there exists an infinite (finite,
resp.) run ρ = s0, s1, . . . sn . . . in P REG(A) such that si = (qi, Zi, Ci), and
(ωi, υ) ∈ Zi × Ci for each i ≥ 0 (0 ≤ i ≤ n, resp.).</p>
      </sec>
      <sec id="sec-2-4">
        <title>Petri Nets &amp; Concurrency { 427</title>
        <p>Proof. Let us start with the finite run case, and let Zi = [ωi]. The base case is
straightforward – just assume C0 = {u | ω0 |=u I(q0)} and notice that υ ∈ C0.</p>
        <p>Assume that we have already constructed a finite run ρn = s0, s1, . . . sn−1.</p>
        <p>If tn−1 →d tn is a time transition, then τ (Zn−1) = Zn, ωn ∈ Zn, υ ∈ Cn−1,
and ωn |=υ I(qn). Therefore, from Corollary 1 we obtain that there exists C′
such that (Zn, Cn−1) I(;qn) (Zn, C′ ), υ ∈ C′ , and conclude the case by placing
Cn = C′ , and the inductive assumption.</p>
        <p>If tn−1 →d tn is an action transition, then there exists a transition in A such
that for some guard g and reset r we have qn−1 d→,g,r qn. Notice that as (ωn−1, υ) ∈
Zn−1 × Cn−1, ωn−1 |=υ g, ωn−1[r] = ωn, and ωn |=υ I(qn), from Corollary 1 we
have that there exist sets C′ , C′ satisfying (Zn−1, Cn−1) ;g (Zn−1, C′ ), υ ∈ C′ ,
and (Zn−1, C′ ) I(;qn) (Zn, C′ ). We conclude the case by assuming Cn = C′ .</p>
        <p>Let μ = t0, t1, . . . be an infinite run in Aυ. We have already shown that
for each finite prefix μn = t0, t1, . . . tn we can construct its counterpart ρn =
s0n, s1n, . . . snn in P REG(A), where sin = (qi, Zi, Cin). Notice that Cin = Cin+1, so
the infinite sequence ρ = s0, s1, . . ., where si = (qi, Zi, Cii) is a valid infinite run
in P REG(A) satisfying (ωi, υ) ∈ Zi × Cii for all i ≥ 0.</p>
        <p>The following definition formalizes the connection between parametric
region graph, and region graphs. In what follows, by a subgraph of P REG(A) =
d d d
hS, s0, →i we mean a tuple hS′ , s0, ֒ →i, where S′ is a subset of S, and ֒ → is the
restriction of →d to S′ .</p>
        <p>Definition 8. Let A be a parametric timed automaton, υ – a parameter
valuation, and F – a subgraph of P REG(A). By proj(F, υ) we define a subgraph of
F whose states are tuples (q, Z, C) such that υ ∈ C.</p>
        <p>Observe that proj(P REG(A), υ) is in fact isomorphic with the region graph
of Aυ – by a forgetful functor stripping C from tuple (q, Z, C).
3</p>
      </sec>
    </sec>
    <sec id="sec-3">
      <title>Bounded Model Checking for ECTL−X</title>
      <p>
        The central idea of bounded model checking is to unfold the computation tree
of a considered model up to some depth, and then perform the analysis of such
a finite structure [
        <xref ref-type="bibr" rid="ref5">5</xref>
        ]. Such an approach limits us to verification (and in our case
– parameter synthesis) of existential properties only, it should be noted however
that implicit model checking methods often fail in case of large and complex
systems. Bounded model checking seems to be especially effective in searching
for counterexamples, i.e. in proving that some undesirable property holds in a
model. This allows for detection of serious design flaws of concurrent and reactive
systems.
      </p>
      <p>The non-parametric model checking tool verifies a model (system
specification) against a given property (usually in form of a temporal logic formula),
producing the answer of simple holds/does not hold type. Its parametric
counterpart is supposed to work slightly differently – having a parametric model we
expect the answer in form of a set of parameter values under which a given
property is satisfied. The automated synthesis of a complete set of desired parameter
valuations is not possible in case of timed automata due to general
undecidability of the problem, however obtaining a part of this set still seems to be a
worthy goal. Our approach allows for incremental synthesis of parameters, i.e. if
the valuations obtained by analysis of a part of a computation tree are not
sufficient, then the tree can be unfolded up to a greater depth for further analysis.
Combined with an expert supervision, the synthesized parameter valuations can
give rise to hypotheses specifying the whole space of desired parameters.</p>
      <p>We propose the following general flow of property verification/parameter
synthesis.</p>
      <p>
        The above diagram is very general. One of the approaches in the current
applications of bounded model checking to verification of system properties is
to encode the limited part of the computation tree together with a property in
question as a propositional formula [
        <xref ref-type="bibr" rid="ref13 ref6">6, 13</xref>
        ]. The result can be checked using an
efficient SAT-solver.
3.1
      </p>
      <sec id="sec-3-1">
        <title>From Parametric Region Graph to concrete semantics</title>
        <p>The P REG(A) structure is infinite. In order to represent the infinite runs in a
finite substructure we need a notion of loop.</p>
        <sec id="sec-3-1-1">
          <title>Petri Nets &amp; Concurrency { 429</title>
          <p>Definition 9. Let ρn = s0, s1, . . . sn be a finite run in P REG(A), and si →d si+1
for all 0 ≤ i &lt; n. If sn = (qn, Zn, Cn) and there exists si = (qi, Zi, Ci), where
0 ≤ i &lt; n such that sn →d si and qn = qi, Zn = Zi, then ρn is called a loop.</p>
          <p>Let ρn = s0, s1, . . . sn be a loop in P REG(A), such that si = (qi, Zi, Ci), and
(qn, Zn) = (qj , Zj ) for some j &lt; n. We can create an infinite run ρˆ = sˆ0, sˆ1, . . .
by unwinding the ρn loop as follows:
sˆi =
(qi, Zi, Cn) for i &lt; n
(qj+(n−i)mod(n−j), Zj+(n−i)mod(n−j), Cn) for i ≥ n.</p>
          <p>The validity of such a construction is based on the observation that Cn ⊆ Ci for
all 0 ≤ i ≤ n and the fact that transitions in P REG(A) are defined in terms of
gZ and guards only. Applying Corollary 2 to such an unwinding we obtain the
following corollary.</p>
          <p>
            Corollary 3. Let ρ = s0, s1, . . . , sn be a loop in P REG(A), where si = (qi, Zi, Ci),
and υ ∈ Cn – a parameter valuation. There exists an infinite run μt = t0, t1, . . .
in the concrete semantics of Aυ, where ti = (qˆi, ωi), ωi ∈ Zi for i &lt; n,
ωi ∈ Zj+(n−i)mod(n−j) for i ≥ n, and:
qˆi =
qi for i &lt; n
qj+(n−i)mod(n−j) for i ≥ n.
The presented method can be applied to the verification of a variety of
properties. As the example, in this subsection we present the application of introduced
theory to verification of properties specified in the existential part of
Computation Tree Logic (CTL−X) without the next operator [
            <xref ref-type="bibr" rid="ref9">9</xref>
            ] – namely ECTL−X.
Intuitively, CTL−X uses a branching time model, where many possible paths in
the future exist. The whole CTL−X contains both the universal (”for all the
possible paths”) and existential modalities (”there exists a path in the future”) while
ECTL−X contains only the latter ones – see [
            <xref ref-type="bibr" rid="ref13">13</xref>
            ] for more thorough treatment.
          </p>
        </sec>
      </sec>
      <sec id="sec-3-2">
        <title>Definition 10 (CTL−X and ECTL−X syntax). Let PV be a set of propositions</title>
        <p>containing the true symbol, and p ∈ PV. The set of well-formed CTL−X formulae
is given by the following grammar:</p>
        <p>Φ ::= p | ¬Φ | Φ ∨ Φ | Φ ∧ Φ | EGΦ | EΦU Φ.</p>
        <p>The existential subset of CTL−X, i.e. ECTL−X is defined as a restriction of
CTL−X such that the negation can be applied to the propositions only.</p>
        <p>Additionally we use the derived modalities: EF α d=ef E(trueU α), AF α =
def
def
¬EG¬α, AGα = ¬EF ¬α. Each modality of CTL−X has an intuitive meaning.
The path quantifier A stands for ”on every path” and E means ”there exists a
path”. G stands for ”in all the states”, F means ”in some state”, and U has a
meaning of ”until”.</p>
        <p>We augment the given parametric timed automaton A = hQ, q0, A, X, P, →
, Ii with a labelling function L : Q → 2PV . Let us present an intepretation of
ECTL−X formulae for a parametric region graph.</p>
      </sec>
      <sec id="sec-3-3">
        <title>Definition 11 (ECTL−X semantics for parametric region graph). Let</title>
        <p>A = hQ, q0, A, X, P, →, Ii be a parametric timed automaton, and F – a subgraph
of its parametric region graph, such that (q0, Z0, C0′), where C0′ ⊆ C0, is a state
of F . Let s be a state of F , p ∈ PV, and α, β be ECTL−X formulae. We treat
F as a model for ECTL−X formulae, defining the |= relation as follows.
1. F, (q, Z, C) |= p iff p ∈ L(q),
2. F, s |= ¬p iff F, s 6|= p,
3. F, s |= α ∨ β iff F, s |= α or F, s |= β,
4. F, s |= EαU β iff there exists a run ρn = s0, s1, . . ., where s0 = s, si are
states of F for i ≥ 0, F, sj |= β for some j ≥ 0, and F, si |= β for all i &lt; j,
5. F, s |= EGα iff there exists a run ρn = s0, s1, . . ., such that F, si |= α for all
i ≥ 0.</p>
        <p>We abbreviate F, (q0, Z0, C0) |= α as F |= α.</p>
        <p>The counterpart of the above definition for the timed automaton Aυ =
d
hS, s0, →i obtained from the parametric timed automaton A under the parameter
valuation υ is similar – except for that it is defined over the concrete
semantics (s ∈ S). Therefore the only difference is in the first clause which takes the
following form:
1. Aυ, (q, ω) |= p iff p ∈ L(q)
As previously, we abbreviate Aυ, (q0, ω0) |= α as Aυ |= α.</p>
        <p>In order to apply bounded model checking to verification of temporal
properties in P REG(A) we need to specify the version of the above semantics for finite
subgraphs of P REG(A). The only difference concerns clauses 4 and 5 which
take the following form:
4. F, s |= EαU β iff there exists a finite run ρn = s0, s1, . . . sn, where s0 = s, si
are states of F for 0 ≤ i ≤ n, F, sj |= β for some 0 ≤ j ≤ n, and F, si |= β
for all i &lt; j,
5. F, s |= EGα iff there exists a loop ρn = s0, s1, . . . , sn, such that F, si |= α
for all 0 ≤ i ≤ n.</p>
        <p>
          Recall that timed automaton Aυ is strongly non-zeno (see [
          <xref ref-type="bibr" rid="ref16">16</xref>
          ]) iff for each
sequence of states q1, . . . , qn such that qi ai−,g→i,ri qi+1 for all 0 ≤ i &lt; n, and
qn an−,g→n,rn q1 (we call such a sequence a structural loop) there exists a clock x
satisfying the following conditions:
– for some 1 ≤ i ≤ n the x clock is reset in step i (i.e. x := 0 ∈ ri),
        </p>
        <sec id="sec-3-3-1">
          <title>Petri Nets &amp; Concurrency { 431</title>
          <p>– there exists 1 ≤ j ≤ n such that for any clock valuation ω if ω |=υ gj, then
ω(x) ≥ 1.</p>
          <p>
            Intuitively, if an automaton is strongly non-zeno, then in each its loop at least
one unit of time elapses ([
            <xref ref-type="bibr" rid="ref16">16</xref>
            ]). Notice that checking if the automaton is strongly
non-zeno does not require any representation of the state space.
Theorem 1. Let A be a parametric timed automaton, F – a finite subgraph of
P REG(A) containing state (q0, Z0, C0′), where C0′ ⊆ C0, and P = T{C | (q, Z, C)
is a state of F }. If P is nonempty, and Aυ is strongly non-zeno for each υ ∈ P ,
then for each formula α ∈ ECTL−X if F |= α, then Aυ |= α for all υ ∈ P .
Proof. Let υ ∈ P be a parameter valuation. Denote by Fˆ a (possibly infinite)
subgraph of P REG(A) created in two steps:
– firstly, by adding to F the new states created by unwinding of each loop
along the lines presented above – obtaining F ′ ,
– secondly, by replacing all the states (q, Z, C) in F ′ by (q, Z, P ) – obtaining
          </p>
          <p>Fˆ.</p>
          <p>
            It is easy to see that F |= α iff Fˆ |= α. Recall that proj(Fˆ, υ) is isomorphic to
some subgraph of the region graph of Aυ. As satisfiability of ECTL−X formulae
in a subgraph of the region graph implies satisfiability in the region graph, and
satisfiability in region graph is equivalent to satisfiability in the concrete model
(see [
            <xref ref-type="bibr" rid="ref16">16</xref>
            ]) we obtain the thesis of the theorem.
3.3
          </p>
        </sec>
      </sec>
      <sec id="sec-3-4">
        <title>Example – four phase handshake protocol</title>
        <p>In this section we perform a first step in parametric analysis of a simplified
version of four phase handshake protocol. The protocol is extensively used in
practice and widely studied, having both the software and hardware
implementations [?,?]. The considered system consists of two communicating entities –
the Producer and the Consumer. The Producer creates data packages and sends
them to the Consumer. Both the components communicate using two shared
boolean variables, that is: req (request) governed by the Producer and used to
signal the Consumer that the data is prepared and ready to be read, and ack
(acknowledge) governed by the Consumer and used to signal the Producer that
the data has been read successfully and the Consumer is ready. The initial value
of both the variables is false.</p>
        <p>The running system goes through the following sequence of signals (req, ack):
(f alse, f alse) → (true, f alse) → (true, true) → (f alse, true) → (f alse, f alse).</p>
        <p>As we have no tool for automated analysis at our disposal yet, we analyze
the simplified version of the system behaviour. We introduce two parameters,
omitting the signal propagation time, namely: minIO, and maxIO being,
respectively, the lower and the upper bound on read/write time.
req := true
ack := true</p>
        <p>The IdleSender function guards the time that the Producer is allowed to be
idle after putting data into some shared transmission vehicle (e.g. a bus). Let
us put IdleSender() := maxIO − minIO and unwind the Parametric Region
Graph of Figure 3 (we omit the dummy clock x0).</p>
        <p>Notice that the above graph contains a loop, introduced by the sequence of
actions: τ, τ, putData, readData, return. This loop can be unwinded as presented
in Subsection 4.1 into an infinite path in the Parametric Region Graph, and into
putData
minIO &lt; x1</p>
        <p>x2 := 0
putData
τ
readData
τ
readData</p>
        <p>return
s1
[(2,0)]
maxIO &gt; 2
minIO ≤ 2</p>
        <p>s1 s2 s1
mm[ia(nx2II,O0O.1≤≥)]12 mma[(ix1nI.I1OO,0≥)=]20 mmaix[n(I2IO,O1&gt;)=]10
loops in concrete semantics of non-parametric timed automata with minIO = 0,
and maxIO instantiated by any value greater that 1.</p>
        <p>The graph of Figure 4, treated as a subgraph of the Parametric Region Graph
of Figure 3 allows us to observe that in the considered system the property
EGEF (P roducerIdle ∧ ConsumerReady) holds for minIO = 0, and maxIO &gt;
1, with the previously mentioned loop as a witness. The intuition behind the
considered formula is that the Producer will put data into the transmission
infinitely often in the running system.</p>
        <p>Of course, this is only the first, hand-made, step of synthesis of the
parameter valuations under which the considered property is satisfied. The complete
analysis of non-simplified versions with more parameters and components has to
wait until we develop the planned tool.</p>
      </sec>
    </sec>
    <sec id="sec-4">
      <title>4 Future work</title>
      <p>
        The theory presented in this paper is to be implemented in Verics model checker
[
        <xref ref-type="bibr" rid="ref12">12</xref>
        ]. There is a growing evidence [14, ?] of success of model checking in
verification of safety critical industrial applications, and the idea of parameter synthesis
for a complex model or protocol seems to be promising in analysis and design of
real-world systems. Also, as the method is quite general, we expect that it may
be applied to many known temporal, modal and epistemic logics.
      </p>
    </sec>
  </body>
  <back>
    <ref-list>
      <ref id="ref1">
        <mixed-citation>
          1.
          <string-name>
            <given-names>R.</given-names>
            <surname>Alur</surname>
          </string-name>
          and
          <string-name>
            <given-names>D.</given-names>
            <surname>Dill</surname>
          </string-name>
          .
          <article-title>A theory of timed automata</article-title>
          .
          <source>Theoretical Computer Science</source>
          ,
          <volume>126</volume>
          (
          <issue>2</issue>
          ):
          <fpage>183</fpage>
          -
          <lpage>235</lpage>
          ,
          <year>1994</year>
          .
        </mixed-citation>
      </ref>
      <ref id="ref2">
        <mixed-citation>
          2.
          <string-name>
            <given-names>R.</given-names>
            <surname>Alur</surname>
          </string-name>
          ,
          <string-name>
            <given-names>T.</given-names>
            <surname>Henzinger</surname>
          </string-name>
          , and
          <string-name>
            <given-names>M.</given-names>
            <surname>Vardi</surname>
          </string-name>
          .
          <article-title>Parametric real-time reasoning</article-title>
          .
          <source>In Proc. of the 25th Ann. Symp. on Theory of Computing (STOC'93)</source>
          , pages
          <fpage>592</fpage>
          -
          <lpage>601</lpage>
          . ACM,
          <year>1993</year>
          .
        </mixed-citation>
      </ref>
      <ref id="ref3">
        <mixed-citation>
          3.
          <string-name>
            <given-names>E</given-names>
            <surname>´</surname>
          </string-name>
          . Andr´e,
          <string-name>
            <given-names>T.</given-names>
            <surname>Chatain</surname>
          </string-name>
          , E. Encrenaz, and
          <string-name>
            <given-names>L.</given-names>
            <surname>Fribourg</surname>
          </string-name>
          .
          <article-title>An inverse method for parametric timed automata</article-title>
          .
          <source>International Journal of Foundations of Computer Science</source>
          ,
          <volume>20</volume>
          (
          <issue>5</issue>
          ):
          <fpage>819</fpage>
          -
          <lpage>836</lpage>
          ,
          <year>October 2009</year>
          .
        </mixed-citation>
      </ref>
      <ref id="ref4">
        <mixed-citation>
          4.
          <string-name>
            <given-names>A.</given-names>
            <surname>Annichini</surname>
          </string-name>
          ,
          <string-name>
            <given-names>A.</given-names>
            <surname>Bouajjani</surname>
          </string-name>
          , and
          <string-name>
            <given-names>M.</given-names>
            <surname>Sighireanu</surname>
          </string-name>
          .
          <article-title>Trex: A tool for reachability analysis of complex systems</article-title>
          .
          <source>In Proc. of CAV</source>
          , pages
          <fpage>368</fpage>
          -
          <lpage>372</lpage>
          ,
          <year>2001</year>
          .
        </mixed-citation>
      </ref>
      <ref id="ref5">
        <mixed-citation>
          5.
          <string-name>
            <given-names>A.</given-names>
            <surname>Biere</surname>
          </string-name>
          ,
          <string-name>
            <given-names>A.</given-names>
            <surname>Cimatti</surname>
          </string-name>
          ,
          <string-name>
            <given-names>E.</given-names>
            <surname>Clarke</surname>
          </string-name>
          ,
          <string-name>
            <given-names>O.</given-names>
            <surname>Strichman</surname>
          </string-name>
          , and
          <string-name>
            <given-names>Y.</given-names>
            <surname>Zhu</surname>
          </string-name>
          .
          <article-title>Bounded model checking</article-title>
          .
          <source>In Highly Dependable Software</source>
          , volume
          <volume>58</volume>
          of Advances in Computers. Academic Press,
          <year>2003</year>
          . Pre-print.
        </mixed-citation>
      </ref>
      <ref id="ref6">
        <mixed-citation>
          6.
          <string-name>
            <given-names>I.</given-names>
            <surname>Blunno</surname>
          </string-name>
          ,
          <string-name>
            <given-names>J.</given-names>
            <surname>Cortadella</surname>
          </string-name>
          ,
          <string-name>
            <given-names>A.</given-names>
            <surname>Kondratyev</surname>
          </string-name>
          ,
          <string-name>
            <given-names>L.</given-names>
            <surname>Lavagno</surname>
          </string-name>
          ,
          <string-name>
            <given-names>K.</given-names>
            <surname>Lwin</surname>
          </string-name>
          , and
          <string-name>
            <given-names>C.</given-names>
            <surname>Sotiriou</surname>
          </string-name>
          .
          <article-title>Handshake protocols for de-synchronization</article-title>
          .
          <source>In International Symposium on Advanced Research in Asynchronous Circuits and Systems</source>
          , pages
          <fpage>149</fpage>
          -
          <lpage>158</lpage>
          . IEEE Computer Society Press,
          <year>2004</year>
          .
        </mixed-citation>
      </ref>
      <ref id="ref7">
        <mixed-citation>
          7.
          <string-name>
            <given-names>E.</given-names>
            <surname>Clarke</surname>
          </string-name>
          ,
          <string-name>
            <given-names>A.</given-names>
            <surname>Biere</surname>
          </string-name>
          ,
          <string-name>
            <given-names>R.</given-names>
            <surname>Raimi</surname>
          </string-name>
          , and
          <string-name>
            <given-names>Y.</given-names>
            <surname>Zhu</surname>
          </string-name>
          .
          <article-title>Bounded model checking using satisfiability solving</article-title>
          .
          <source>Formal Methods in System Design</source>
          ,
          <volume>19</volume>
          (
          <issue>1</issue>
          ):
          <fpage>7</fpage>
          -
          <lpage>34</lpage>
          ,
          <year>2001</year>
          .
        </mixed-citation>
      </ref>
      <ref id="ref8">
        <mixed-citation>
          8.
          <string-name>
            <given-names>H.</given-names>
            <surname>Dierks</surname>
          </string-name>
          and
          <string-name>
            <given-names>J.</given-names>
            <surname>Tapken</surname>
          </string-name>
          .
          <article-title>Moby/DC - a tool for model-checking parametric realtime specifications</article-title>
          .
          <source>In Proc. of the 9th Int. Conf. on Tools and Algorithms for the Construction and Analysis of Systems (TACAS'03)</source>
          , volume
          <volume>2619</volume>
          <source>of LNCS</source>
          , pages
          <fpage>271</fpage>
          -
          <lpage>277</lpage>
          . Springer-Verlag,
          <year>2003</year>
          .
        </mixed-citation>
      </ref>
      <ref id="ref9">
        <mixed-citation>
          9.
          <string-name>
            <given-names>L.</given-names>
            <surname>Doyen</surname>
          </string-name>
          .
          <article-title>Robust parametric reachability for timed automata</article-title>
          .
          <source>Information Processing Letters</source>
          ,
          <volume>102</volume>
          :
          <fpage>208</fpage>
          -
          <lpage>213</lpage>
          ,
          <year>2007</year>
          .
        </mixed-citation>
      </ref>
      <ref id="ref10">
        <mixed-citation>
          10.
          <string-name>
            <given-names>E. A.</given-names>
            <surname>Emerson</surname>
          </string-name>
          and
          <string-name>
            <given-names>E.</given-names>
            <surname>Clarke</surname>
          </string-name>
          .
          <article-title>Using branching-time temporal logic to synthesize synchronization skeletons</article-title>
          .
          <source>Science of Computer Programming</source>
          ,
          <volume>2</volume>
          (
          <issue>3</issue>
          ):
          <fpage>241</fpage>
          -
          <lpage>266</lpage>
          ,
          <year>1982</year>
          .
        </mixed-citation>
      </ref>
      <ref id="ref11">
        <mixed-citation>
          11.
          <string-name>
            <given-names>S.B.</given-names>
            <surname>Furber</surname>
          </string-name>
          and
          <string-name>
            <given-names>P.</given-names>
            <surname>Day</surname>
          </string-name>
          .
          <article-title>Four-phase micropipeline latch control circuits</article-title>
          .
          <source>In IEEE Transactions on VLSI Systems</source>
          , volume
          <volume>4</volume>
          , pages
          <fpage>247</fpage>
          -
          <lpage>253</lpage>
          ,
          <year>1996</year>
          .
        </mixed-citation>
      </ref>
      <ref id="ref12">
        <mixed-citation>
          12. T. Henzinger,
          <string-name>
            <given-names>P.</given-names>
            <surname>Ho</surname>
          </string-name>
          , and
          <string-name>
            <given-names>H.</given-names>
            <surname>Wong-Toi</surname>
          </string-name>
          .
          <article-title>HyTech: A model checker for hybrid systems</article-title>
          .
          <source>In Proc. of the 9th Int. Conf. on Computer Aided Verification (CAV'97)</source>
          , volume
          <volume>1254</volume>
          <source>of LNCS</source>
          , pages
          <fpage>460</fpage>
          -
          <lpage>463</lpage>
          . Springer-Verlag,
          <year>1997</year>
          .
        </mixed-citation>
      </ref>
      <ref id="ref13">
        <mixed-citation>
          13.
          <string-name>
            <given-names>T.</given-names>
            <surname>Hune</surname>
          </string-name>
          ,
          <string-name>
            <given-names>J.</given-names>
            <surname>Romijn</surname>
          </string-name>
          ,
          <string-name>
            <given-names>M.</given-names>
            <surname>Stoelinga</surname>
          </string-name>
          , and
          <string-name>
            <given-names>F.</given-names>
            <surname>Vaandrager</surname>
          </string-name>
          .
          <article-title>Linear parametric model checking of timed automata</article-title>
          .
          <source>In Proc. of the 7th Int. Conf. on Tools and Algorithms for the Construction and Analysis of Systems (TACAS'01)</source>
          , volume
          <volume>2031</volume>
          <source>of LNCS</source>
          , pages
          <fpage>189</fpage>
          -
          <lpage>203</lpage>
          . Springer-Verlag,
          <year>2001</year>
          .
        </mixed-citation>
      </ref>
      <ref id="ref14">
        <mixed-citation>
          14.
          <string-name>
            <surname>M. Kacprzak</surname>
            ,
            <given-names>W.</given-names>
          </string-name>
          <string-name>
            <surname>Nabialek</surname>
            ,
            <given-names>A.</given-names>
          </string-name>
          <string-name>
            <surname>Niewiadomski</surname>
            ,
            <given-names>W.</given-names>
          </string-name>
          <string-name>
            <surname>Penczek</surname>
            , A. P´olrola,
            <given-names>M.</given-names>
          </string-name>
          <string-name>
            <surname>Szreter</surname>
            ,
            <given-names>B.</given-names>
          </string-name>
          <article-title>Wo´zna, and</article-title>
          <string-name>
            <given-names>A.</given-names>
            <surname>Zbrzezny</surname>
          </string-name>
          .
          <article-title>VerICS 2008 - a model checker for time Petri nets and high-level languages</article-title>
          .
          <source>In Proc. of Int. Workshop on Petri Nets and Software Engineering (PNSE'09)</source>
          , pages
          <fpage>119</fpage>
          -
          <lpage>132</lpage>
          . University of Hamburg,
          <year>2009</year>
          .
        </mixed-citation>
      </ref>
      <ref id="ref15">
        <mixed-citation>
          15.
          <string-name>
            <surname>Spelberg</surname>
            <given-names>R. L.</given-names>
          </string-name>
          ,
          <string-name>
            <surname>De Rooij R. C. H</surname>
          </string-name>
          ., , and Toetenel W. J.
          <article-title>Application of parametric model checking - the root contention protocol using lpmc</article-title>
          .
          <source>In Proc. of the 7th ASCI Conference</source>
          , pages
          <fpage>73</fpage>
          -
          <lpage>85</lpage>
          ,
          <year>February 2000</year>
          .
        </mixed-citation>
      </ref>
      <ref id="ref16">
        <mixed-citation>
          16.
          <string-name>
            <given-names>W.</given-names>
            <surname>Penczek</surname>
          </string-name>
          ,
          <string-name>
            <surname>B.</surname>
          </string-name>
          <article-title>Wo´zna, and</article-title>
          <string-name>
            <given-names>A.</given-names>
            <surname>Zbrzezny</surname>
          </string-name>
          .
          <article-title>Bounded model checking for the universal fragment of CTL</article-title>
          .
          <source>Fundamenta Informaticae</source>
          ,
          <volume>51</volume>
          (
          <issue>1-2</issue>
          ):
          <fpage>135</fpage>
          -
          <lpage>156</lpage>
          ,
          <year>2002</year>
          .
        </mixed-citation>
      </ref>
      <ref id="ref17">
        <mixed-citation>
          17.
          <string-name>
            <given-names>M.</given-names>
            <surname>Stoelinga</surname>
          </string-name>
          .
          <article-title>Fun with firewire: A comparative study of formal verification methods applied to the ieee 1394 root contention protocol</article-title>
          .
          <source>In Formal Asp. Comput.</source>
          , volume
          <volume>14</volume>
          , pages
          <fpage>328</fpage>
          -
          <lpage>337</lpage>
          ,
          <year>2003</year>
          .
        </mixed-citation>
      </ref>
      <ref id="ref18">
        <mixed-citation>
          18.
          <string-name>
            <surname>L-M. Tranouez</surname>
            ,
            <given-names>D.</given-names>
          </string-name>
          <string-name>
            <surname>Lime</surname>
            , and
            <given-names>O. H.</given-names>
          </string-name>
          <string-name>
            <surname>Roux</surname>
          </string-name>
          .
          <article-title>Parametric model checking of time Petri nets with stopwatches using the state-class graph</article-title>
          .
          <source>In Proc. of the 6th Int. Workshop on Formal Analysis and Modeling of Timed Systems (FORMATS'08)</source>
          , volume
          <volume>5215</volume>
          <source>of LNCS</source>
          , pages
          <fpage>280</fpage>
          -
          <lpage>294</lpage>
          . Springer-Verlag,
          <year>2008</year>
          .
        </mixed-citation>
      </ref>
      <ref id="ref19">
        <mixed-citation>
          19.
          <string-name>
            <given-names>S.</given-names>
            <surname>Tripakis</surname>
          </string-name>
          and
          <string-name>
            <given-names>S.</given-names>
            <surname>Yovine</surname>
          </string-name>
          .
          <article-title>Analysis of timed systems using time-abstracting bisimulations</article-title>
          .
          <source>Formal Methods in System Design</source>
          ,
          <volume>18</volume>
          (
          <issue>1</issue>
          ):
          <fpage>25</fpage>
          -
          <lpage>68</lpage>
          ,
          <year>2001</year>
          .
        </mixed-citation>
      </ref>
    </ref-list>
  </back>
</article>